S390: Decouple Add/Sub/Neg to 32/64 Bit Op

src/s390/simulator-s390.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_S390
 
@@ skipping 5960 matching lines @@
   int m3 = AS(RRFInstruction)->M3Value();        \
   int m4 = AS(RRFInstruction)->M4Value();        \
   int length = 4;
 
 #define DECODE_RRF_A_INSTRUCTION(r1, r2, r3) \
   int r1 = AS(RRFInstruction)->R1Value();    \
   int r2 = AS(RRFInstruction)->R2Value();    \
   int r3 = AS(RRFInstruction)->R3Value();    \
   int length = 4;
 
+#define DECODE_RRF_C_INSTRUCTION(r1, r2, m3)                            \
+  int r1 = AS(RRFInstruction)->R1Value();                               \
+  int r2 = AS(RRFInstruction)->R2Value();                               \
+  Condition m3 = static_cast<Condition>(AS(RRFInstruction)->M3Value()); \
+  int length = 4;
+
 #define DECODE_RR_INSTRUCTION(r1, r2)    \
   int r1 = AS(RRInstruction)->R1Value(); \
   int r2 = AS(RRInstruction)->R2Value(); \
   int length = 2;
 
 #define DECODE_RIE_D_INSTRUCTION(r1, r2, i2)  \
   int r1 = AS(RIEInstruction)->R1Value();     \
   int r2 = AS(RIEInstruction)->R2Value();     \
   int32_t i2 = AS(RIEInstruction)->I6Value(); \
   int length = 6;
@@ skipping 4469 matching lines @@
     r1_val_ptr[i] = __builtin_popcount(x);
 #else
 #error unsupport __builtin_popcount
 #endif
   }
   set_register(r1, static_cast<uint64_t>(r1_val));
   return length;
 }
 
 EVALUATE(LOCGR) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(LOCR);
+  DECODE_RRF_C_INSTRUCTION(r1, r2, m3);
+  if (TestConditionCode(m3)) {
+    set_register(r1, get_register(r2));
+  }
+  return length;
 }
 
 EVALUATE(NGRK) {
   DCHECK_OPCODE(NGRK);
   DECODE_RRF_A_INSTRUCTION(r1, r2, r3);
   // 64-bit Non-clobbering arithmetics / bitwise ops.
   int64_t r2_val = get_register(r2);
   int64_t r3_val = get_register(r3);
   uint64_t bitwise_result = 0;
   bitwise_result = r2_val & r3_val;
@@ skipping 74 matching lines @@
   uint64_t r2_val = get_register(r2);
   uint64_t r3_val = get_register(r3);
   bool isOF = CheckOverflowForUIntSub(r2_val, r3_val);
   SetS390ConditionCode<uint64_t>(r2_val - r3_val, 0);
   SetS390OverflowCode(isOF);
   set_register(r1, r2_val - r3_val);
   return length;
 }
 
 EVALUATE(LOCR) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(LOCR);
+  DECODE_RRF_C_INSTRUCTION(r1, r2, m3);
+  if (TestConditionCode(m3)) {
+    set_low_register(r1, get_low_register<int32_t>(r2));
+  }
+  return length;
 }
 
 EVALUATE(NRK) {
   DCHECK_OPCODE(NRK);
   DECODE_RRF_A_INSTRUCTION(r1, r2, r3);
   // 32-bit Non-clobbering arithmetics / bitwise ops
   int32_t r2_val = get_low_register<int32_t>(r2);
   int32_t r3_val = get_low_register<int32_t>(r3);
   // Assume bitwise operation here
   uint32_t bitwise_result = 0;
@@ skipping 1979 matching lines @@
   return 0;
 }
 
 #undef EVALUATE
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 #endif  // V8_TARGET_ARCH_S390