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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 2218023002: [x64][ia32] Add Support for the Float64Neg and Float32Neg turbofan operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 9
10 namespace v8 { 10 namespace v8 {
(...skipping 1064 matching lines...) Expand 10 before | Expand all | Expand 10 after
1075 1075
1076 void InstructionSelector::VisitFloat32RoundTiesEven(Node* node) { 1076 void InstructionSelector::VisitFloat32RoundTiesEven(Node* node) {
1077 VisitRR(this, node, kSSEFloat32Round | MiscField::encode(kRoundToNearest)); 1077 VisitRR(this, node, kSSEFloat32Round | MiscField::encode(kRoundToNearest));
1078 } 1078 }
1079 1079
1080 1080
1081 void InstructionSelector::VisitFloat64RoundTiesEven(Node* node) { 1081 void InstructionSelector::VisitFloat64RoundTiesEven(Node* node) {
1082 VisitRR(this, node, kSSEFloat64Round | MiscField::encode(kRoundToNearest)); 1082 VisitRR(this, node, kSSEFloat64Round | MiscField::encode(kRoundToNearest));
1083 } 1083 }
1084 1084
1085 void InstructionSelector::VisitFloat32Neg(Node* node) { UNREACHABLE(); } 1085 void InstructionSelector::VisitFloat32Neg(Node* node) {
1086 VisitFloatUnop(this, node, node->InputAt(0), kAVXFloat32Neg, kSSEFloat32Neg);
1087 }
1086 1088
1087 void InstructionSelector::VisitFloat64Neg(Node* node) { UNREACHABLE(); } 1089 void InstructionSelector::VisitFloat64Neg(Node* node) {
1090 VisitFloatUnop(this, node, node->InputAt(0), kAVXFloat64Neg, kSSEFloat64Neg);
1091 }
1088 1092
1089 void InstructionSelector::VisitFloat64Ieee754Binop(Node* node, 1093 void InstructionSelector::VisitFloat64Ieee754Binop(Node* node,
1090 InstructionCode opcode) { 1094 InstructionCode opcode) {
1091 IA32OperandGenerator g(this); 1095 IA32OperandGenerator g(this);
1092 Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), 1096 Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)),
1093 g.UseRegister(node->InputAt(1))) 1097 g.UseRegister(node->InputAt(1)))
1094 ->MarkAsCall(); 1098 ->MarkAsCall();
1095 } 1099 }
1096 1100
1097 void InstructionSelector::VisitFloat64Ieee754Unop(Node* node, 1101 void InstructionSelector::VisitFloat64Ieee754Unop(Node* node,
(...skipping 596 matching lines...) Expand 10 before | Expand all | Expand 10 after
1694 inputs[input_count++] = g.UseUniqueRegister(value); 1698 inputs[input_count++] = g.UseUniqueRegister(value);
1695 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 1699 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
1696 Emit(code, 0, nullptr, input_count, inputs); 1700 Emit(code, 0, nullptr, input_count, inputs);
1697 } 1701 }
1698 1702
1699 // static 1703 // static
1700 MachineOperatorBuilder::Flags 1704 MachineOperatorBuilder::Flags
1701 InstructionSelector::SupportedMachineOperatorFlags() { 1705 InstructionSelector::SupportedMachineOperatorFlags() {
1702 MachineOperatorBuilder::Flags flags = 1706 MachineOperatorBuilder::Flags flags =
1703 MachineOperatorBuilder::kWord32ShiftIsSafe | 1707 MachineOperatorBuilder::kWord32ShiftIsSafe |
1704 MachineOperatorBuilder::kWord32Ctz; 1708 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kFloat32Neg |
1709 MachineOperatorBuilder::kFloat64Neg;
1705 if (CpuFeatures::IsSupported(POPCNT)) { 1710 if (CpuFeatures::IsSupported(POPCNT)) {
1706 flags |= MachineOperatorBuilder::kWord32Popcnt; 1711 flags |= MachineOperatorBuilder::kWord32Popcnt;
1707 } 1712 }
1708 if (CpuFeatures::IsSupported(SSE4_1)) { 1713 if (CpuFeatures::IsSupported(SSE4_1)) {
1709 flags |= MachineOperatorBuilder::kFloat32RoundDown | 1714 flags |= MachineOperatorBuilder::kFloat32RoundDown |
1710 MachineOperatorBuilder::kFloat64RoundDown | 1715 MachineOperatorBuilder::kFloat64RoundDown |
1711 MachineOperatorBuilder::kFloat32RoundUp | 1716 MachineOperatorBuilder::kFloat32RoundUp |
1712 MachineOperatorBuilder::kFloat64RoundUp | 1717 MachineOperatorBuilder::kFloat64RoundUp |
1713 MachineOperatorBuilder::kFloat32RoundTruncate | 1718 MachineOperatorBuilder::kFloat32RoundTruncate |
1714 MachineOperatorBuilder::kFloat64RoundTruncate | 1719 MachineOperatorBuilder::kFloat64RoundTruncate |
1715 MachineOperatorBuilder::kFloat32RoundTiesEven | 1720 MachineOperatorBuilder::kFloat32RoundTiesEven |
1716 MachineOperatorBuilder::kFloat64RoundTiesEven; 1721 MachineOperatorBuilder::kFloat64RoundTiesEven;
1717 } 1722 }
1718 return flags; 1723 return flags;
1719 } 1724 }
1720 1725
1721 // static 1726 // static
1722 MachineOperatorBuilder::AlignmentRequirements 1727 MachineOperatorBuilder::AlignmentRequirements
1723 InstructionSelector::AlignmentRequirements() { 1728 InstructionSelector::AlignmentRequirements() {
1724 return MachineOperatorBuilder::AlignmentRequirements:: 1729 return MachineOperatorBuilder::AlignmentRequirements::
1725 FullUnalignedAccessSupport(); 1730 FullUnalignedAccessSupport();
1726 } 1731 }
1727 1732
1728 } // namespace compiler 1733 } // namespace compiler
1729 } // namespace internal 1734 } // namespace internal
1730 } // namespace v8 1735 } // namespace v8
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