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Issue 221693002: PNaCl: Add support for GCC/LLVM vector extensions (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master
Patch Set: Remove TODOs that were done. Created 6 years, 8 months ago
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1 ; RUN: opt -fix-vector-load-store-alignment %s -S | FileCheck %s
2
3 ; The datalayout is needed to determine the alignment of the load/stores.
4 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64 :64:64-p:32:32:32-v128:32:32"
5
6 ; Load.
7
8 define <4 x i1> @test_load_4xi1(<4 x i1>* %loc) {
9 ; CHECK: @test_load_4xi1
10 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <4 x i1>* %loc to i1*
11 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 0
12 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load i1* %[[GEP0]], align 4
13 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <4 x i1> undef, i1 %[[LD0]], i3 2 0
14 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 1
15 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load i1* %[[GEP1]], align 1
16 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <4 x i1> %[[INS0]], i1 %[[LD1]] , i32 1
17 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 2
18 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load i1* %[[GEP2]], align 2
19 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <4 x i1> %[[INS1]], i1 %[[LD2]] , i32 2
20 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 3
21 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load i1* %[[GEP3]], align 1
22 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <4 x i1> %[[INS2]], i1 %[[LD3]] , i32 3
23 ; CHECK-NEXT: ret <4 x i1> %[[INS3]]
24 %loaded = load <4 x i1>* %loc
25 ret <4 x i1> %loaded
26 }
27
28 define <8 x i1> @test_load_8xi1(<8 x i1>* %loc) {
29 ; CHECK: @test_load_8xi1
30 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <8 x i1>* %loc to i1*
31 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 0
32 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load i1* %[[GEP0]], align 8
33 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <8 x i1> undef, i1 %[[LD0]], i3 2 0
34 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 1
35 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load i1* %[[GEP1]], align 1
36 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <8 x i1> %[[INS0]], i1 %[[LD1]] , i32 1
37 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 2
38 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load i1* %[[GEP2]], align 2
39 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <8 x i1> %[[INS1]], i1 %[[LD2]] , i32 2
40 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 3
41 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load i1* %[[GEP3]], align 1
42 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <8 x i1> %[[INS2]], i1 %[[LD3]] , i32 3
43 ; CHECK-NEXT: %[[GEP4:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 4
44 ; CHECK-NEXT: %[[LD4:[0-9]+]] = load i1* %[[GEP4]], align 4
45 ; CHECK-NEXT: %[[INS4:[0-9]+]] = insertelement <8 x i1> %[[INS3]], i1 %[[LD4]] , i32 4
46 ; CHECK-NEXT: %[[GEP5:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 5
47 ; CHECK-NEXT: %[[LD5:[0-9]+]] = load i1* %[[GEP5]], align 1
48 ; CHECK-NEXT: %[[INS5:[0-9]+]] = insertelement <8 x i1> %[[INS4]], i1 %[[LD5]] , i32 5
49 ; CHECK-NEXT: %[[GEP6:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 6
50 ; CHECK-NEXT: %[[LD6:[0-9]+]] = load i1* %[[GEP6]], align 2
51 ; CHECK-NEXT: %[[INS6:[0-9]+]] = insertelement <8 x i1> %[[INS5]], i1 %[[LD6]] , i32 6
52 ; CHECK-NEXT: %[[GEP7:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 7
53 ; CHECK-NEXT: %[[LD7:[0-9]+]] = load i1* %[[GEP7]], align 1
54 ; CHECK-NEXT: %[[INS7:[0-9]+]] = insertelement <8 x i1> %[[INS6]], i1 %[[LD7]] , i32 7
55 ; CHECK-NEXT: ret <8 x i1> %[[INS7]]
56 %loaded = load <8 x i1>* %loc
57 ret <8 x i1> %loaded
58 }
59
60 define <16 x i1> @test_load_16xi1(<16 x i1>* %loc) {
61 ; CHECK: @test_load_16xi1
62 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <16 x i1>* %loc to i1*
63 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 0
64 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load i1* %[[GEP0]], align 16
65 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <16 x i1> undef, i1 %[[LD0]], i 32 0
66 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 1
67 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load i1* %[[GEP1]], align 1
68 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <16 x i1> %[[INS0]], i1 %[[LD1] ], i32 1
69 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 2
70 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load i1* %[[GEP2]], align 2
71 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <16 x i1> %[[INS1]], i1 %[[LD2] ], i32 2
72 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 3
73 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load i1* %[[GEP3]], align 1
74 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <16 x i1> %[[INS2]], i1 %[[LD3] ], i32 3
75 ; CHECK-NEXT: %[[GEP4:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 4
76 ; CHECK-NEXT: %[[LD4:[0-9]+]] = load i1* %[[GEP4]], align 4
77 ; CHECK-NEXT: %[[INS4:[0-9]+]] = insertelement <16 x i1> %[[INS3]], i1 %[[LD4] ], i32 4
78 ; CHECK-NEXT: %[[GEP5:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 5
79 ; CHECK-NEXT: %[[LD5:[0-9]+]] = load i1* %[[GEP5]], align 1
80 ; CHECK-NEXT: %[[INS5:[0-9]+]] = insertelement <16 x i1> %[[INS4]], i1 %[[LD5] ], i32 5
81 ; CHECK-NEXT: %[[GEP6:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 6
82 ; CHECK-NEXT: %[[LD6:[0-9]+]] = load i1* %[[GEP6]], align 2
83 ; CHECK-NEXT: %[[INS6:[0-9]+]] = insertelement <16 x i1> %[[INS5]], i1 %[[LD6] ], i32 6
84 ; CHECK-NEXT: %[[GEP7:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 7
85 ; CHECK-NEXT: %[[LD7:[0-9]+]] = load i1* %[[GEP7]], align 1
86 ; CHECK-NEXT: %[[INS7:[0-9]+]] = insertelement <16 x i1> %[[INS6]], i1 %[[LD7] ], i32 7
87 ; CHECK-NEXT: %[[GEP8:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 8
88 ; CHECK-NEXT: %[[LD8:[0-9]+]] = load i1* %[[GEP8]], align 8
89 ; CHECK-NEXT: %[[INS8:[0-9]+]] = insertelement <16 x i1> %[[INS7]], i1 %[[LD8] ], i32 8
90 ; CHECK-NEXT: %[[GEP9:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 9
91 ; CHECK-NEXT: %[[LD9:[0-9]+]] = load i1* %[[GEP9]], align 1
92 ; CHECK-NEXT: %[[INS9:[0-9]+]] = insertelement <16 x i1> %[[INS8]], i1 %[[LD9] ], i32 9
93 ; CHECK-NEXT: %[[GEP10:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 10
94 ; CHECK-NEXT: %[[LD10:[0-9]+]] = load i1* %[[GEP10]], align 2
95 ; CHECK-NEXT: %[[INS10:[0-9]+]] = insertelement <16 x i1> %[[INS9]], i1 %[[LD1 0]], i32 10
96 ; CHECK-NEXT: %[[GEP11:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 11
97 ; CHECK-NEXT: %[[LD11:[0-9]+]] = load i1* %[[GEP11]], align 1
98 ; CHECK-NEXT: %[[INS11:[0-9]+]] = insertelement <16 x i1> %[[INS10]], i1 %[[LD 11]], i32 11
99 ; CHECK-NEXT: %[[GEP12:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 12
100 ; CHECK-NEXT: %[[LD12:[0-9]+]] = load i1* %[[GEP12]], align 4
101 ; CHECK-NEXT: %[[INS12:[0-9]+]] = insertelement <16 x i1> %[[INS11]], i1 %[[LD 12]], i32 12
102 ; CHECK-NEXT: %[[GEP13:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 13
103 ; CHECK-NEXT: %[[LD13:[0-9]+]] = load i1* %[[GEP13]], align 1
104 ; CHECK-NEXT: %[[INS13:[0-9]+]] = insertelement <16 x i1> %[[INS12]], i1 %[[LD 13]], i32 13
105 ; CHECK-NEXT: %[[GEP14:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 14
106 ; CHECK-NEXT: %[[LD14:[0-9]+]] = load i1* %[[GEP14]], align 2
107 ; CHECK-NEXT: %[[INS14:[0-9]+]] = insertelement <16 x i1> %[[INS13]], i1 %[[LD 14]], i32 14
108 ; CHECK-NEXT: %[[GEP15:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 15
109 ; CHECK-NEXT: %[[LD15:[0-9]+]] = load i1* %[[GEP15]], align 1
110 ; CHECK-NEXT: %[[INS15:[0-9]+]] = insertelement <16 x i1> %[[INS14]], i1 %[[LD 15]], i32 15
111 ; CHECK-NEXT: ret <16 x i1> %[[INS15]]
112 %loaded = load <16 x i1>* %loc
113 ret <16 x i1> %loaded
114 }
115
116 define <4 x i32> @test_load_4xi32(<4 x i32>* %loc) {
117 ; CHECK: @test_load_4xi32
118 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <4 x i32>* %loc to i32*
119 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 0
120 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load i32* %[[GEP0]], align 4
121 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <4 x i32> undef, i32 %[[LD0]], i32 0
122 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 1
123 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load i32* %[[GEP1]], align 4
124 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <4 x i32> %[[INS0]], i32 %[[LD1 ]], i32 1
125 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 2
126 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load i32* %[[GEP2]], align 4
127 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <4 x i32> %[[INS1]], i32 %[[LD2 ]], i32 2
128 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 3
129 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load i32* %[[GEP3]], align 4
130 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <4 x i32> %[[INS2]], i32 %[[LD3 ]], i32 3
131 ; CHECK-NEXT: ret <4 x i32> %[[INS3]]
132 %loaded = load <4 x i32>* %loc
133 ret <4 x i32> %loaded
134 }
135
136 define <4 x float> @test_load_4xfloat(<4 x float>* %loc) {
137 ; CHECK: @test_load_4xfloat
138 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <4 x float>* %loc to float*
139 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 0
140 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load float* %[[GEP0]], align 4
141 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <4 x float> undef, float %[[LD0 ]], i32 0
142 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 1
143 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load float* %[[GEP1]], align 4
144 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <4 x float> %[[INS0]], float %[ [LD1]], i32 1
145 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 2
146 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load float* %[[GEP2]], align 4
147 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <4 x float> %[[INS1]], float %[ [LD2]], i32 2
148 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 3
149 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load float* %[[GEP3]], align 4
150 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <4 x float> %[[INS2]], float %[ [LD3]], i32 3
151 ; CHECK-NEXT: ret <4 x float> %[[INS3]]
152 %loaded = load <4 x float>* %loc
153 ret <4 x float> %loaded
154 }
155
156 define <8 x i16> @test_load_8xi16(<8 x i16>* %loc) {
157 ; CHECK: @test_load_8xi16
158 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <8 x i16>* %loc to i16*
159 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 0
160 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load i16* %[[GEP0]], align 4
161 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <8 x i16> undef, i16 %[[LD0]], i32 0
162 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 1
163 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load i16* %[[GEP1]], align 2
164 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <8 x i16> %[[INS0]], i16 %[[LD1 ]], i32 1
165 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 2
166 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load i16* %[[GEP2]], align 4
167 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <8 x i16> %[[INS1]], i16 %[[LD2 ]], i32 2
168 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 3
169 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load i16* %[[GEP3]], align 2
170 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <8 x i16> %[[INS2]], i16 %[[LD3 ]], i32 3
171 ; CHECK-NEXT: %[[GEP4:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 4
172 ; CHECK-NEXT: %[[LD4:[0-9]+]] = load i16* %[[GEP4]], align 4
173 ; CHECK-NEXT: %[[INS4:[0-9]+]] = insertelement <8 x i16> %[[INS3]], i16 %[[LD4 ]], i32 4
174 ; CHECK-NEXT: %[[GEP5:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 5
175 ; CHECK-NEXT: %[[LD5:[0-9]+]] = load i16* %[[GEP5]], align 2
176 ; CHECK-NEXT: %[[INS5:[0-9]+]] = insertelement <8 x i16> %[[INS4]], i16 %[[LD5 ]], i32 5
177 ; CHECK-NEXT: %[[GEP6:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 6
178 ; CHECK-NEXT: %[[LD6:[0-9]+]] = load i16* %[[GEP6]], align 4
179 ; CHECK-NEXT: %[[INS6:[0-9]+]] = insertelement <8 x i16> %[[INS5]], i16 %[[LD6 ]], i32 6
180 ; CHECK-NEXT: %[[GEP7:[0-9]+]] = getelementptr inbounds i16* %[[BASE]], i32 7
181 ; CHECK-NEXT: %[[LD7:[0-9]+]] = load i16* %[[GEP7]], align 2
182 ; CHECK-NEXT: %[[INS7:[0-9]+]] = insertelement <8 x i16> %[[INS6]], i16 %[[LD7 ]], i32 7
183 ; CHECK-NEXT: ret <8 x i16> %[[INS7]]
184 %loaded = load <8 x i16>* %loc
185 ret <8 x i16> %loaded
186 }
187
188 define <16 x i8> @test_load_16xi8(<16 x i8>* %loc) {
189 ; CHECK: @test_load_16xi8
190 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <16 x i8>* %loc to i8*
191 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 0
192 ; CHECK-NEXT: %[[LD0:[0-9]+]] = load i8* %[[GEP0]], align 4
193 ; CHECK-NEXT: %[[INS0:[0-9]+]] = insertelement <16 x i8> undef, i8 %[[LD0]], i 32 0
194 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 1
195 ; CHECK-NEXT: %[[LD1:[0-9]+]] = load i8* %[[GEP1]], align 1
196 ; CHECK-NEXT: %[[INS1:[0-9]+]] = insertelement <16 x i8> %[[INS0]], i8 %[[LD1] ], i32 1
197 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 2
198 ; CHECK-NEXT: %[[LD2:[0-9]+]] = load i8* %[[GEP2]], align 2
199 ; CHECK-NEXT: %[[INS2:[0-9]+]] = insertelement <16 x i8> %[[INS1]], i8 %[[LD2] ], i32 2
200 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 3
201 ; CHECK-NEXT: %[[LD3:[0-9]+]] = load i8* %[[GEP3]], align 1
202 ; CHECK-NEXT: %[[INS3:[0-9]+]] = insertelement <16 x i8> %[[INS2]], i8 %[[LD3] ], i32 3
203 ; CHECK-NEXT: %[[GEP4:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 4
204 ; CHECK-NEXT: %[[LD4:[0-9]+]] = load i8* %[[GEP4]], align 4
205 ; CHECK-NEXT: %[[INS4:[0-9]+]] = insertelement <16 x i8> %[[INS3]], i8 %[[LD4] ], i32 4
206 ; CHECK-NEXT: %[[GEP5:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 5
207 ; CHECK-NEXT: %[[LD5:[0-9]+]] = load i8* %[[GEP5]], align 1
208 ; CHECK-NEXT: %[[INS5:[0-9]+]] = insertelement <16 x i8> %[[INS4]], i8 %[[LD5] ], i32 5
209 ; CHECK-NEXT: %[[GEP6:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 6
210 ; CHECK-NEXT: %[[LD6:[0-9]+]] = load i8* %[[GEP6]], align 2
211 ; CHECK-NEXT: %[[INS6:[0-9]+]] = insertelement <16 x i8> %[[INS5]], i8 %[[LD6] ], i32 6
212 ; CHECK-NEXT: %[[GEP7:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 7
213 ; CHECK-NEXT: %[[LD7:[0-9]+]] = load i8* %[[GEP7]], align 1
214 ; CHECK-NEXT: %[[INS7:[0-9]+]] = insertelement <16 x i8> %[[INS6]], i8 %[[LD7] ], i32 7
215 ; CHECK-NEXT: %[[GEP8:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 8
216 ; CHECK-NEXT: %[[LD8:[0-9]+]] = load i8* %[[GEP8]], align 4
217 ; CHECK-NEXT: %[[INS8:[0-9]+]] = insertelement <16 x i8> %[[INS7]], i8 %[[LD8] ], i32 8
218 ; CHECK-NEXT: %[[GEP9:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 9
219 ; CHECK-NEXT: %[[LD9:[0-9]+]] = load i8* %[[GEP9]], align 1
220 ; CHECK-NEXT: %[[INS9:[0-9]+]] = insertelement <16 x i8> %[[INS8]], i8 %[[LD9] ], i32 9
221 ; CHECK-NEXT: %[[GEP10:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 10
222 ; CHECK-NEXT: %[[LD10:[0-9]+]] = load i8* %[[GEP10]], align 2
223 ; CHECK-NEXT: %[[INS10:[0-9]+]] = insertelement <16 x i8> %[[INS9]], i8 %[[LD1 0]], i32 10
224 ; CHECK-NEXT: %[[GEP11:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 11
225 ; CHECK-NEXT: %[[LD11:[0-9]+]] = load i8* %[[GEP11]], align 1
226 ; CHECK-NEXT: %[[INS11:[0-9]+]] = insertelement <16 x i8> %[[INS10]], i8 %[[LD 11]], i32 11
227 ; CHECK-NEXT: %[[GEP12:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 12
228 ; CHECK-NEXT: %[[LD12:[0-9]+]] = load i8* %[[GEP12]], align 4
229 ; CHECK-NEXT: %[[INS12:[0-9]+]] = insertelement <16 x i8> %[[INS11]], i8 %[[LD 12]], i32 12
230 ; CHECK-NEXT: %[[GEP13:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 13
231 ; CHECK-NEXT: %[[LD13:[0-9]+]] = load i8* %[[GEP13]], align 1
232 ; CHECK-NEXT: %[[INS13:[0-9]+]] = insertelement <16 x i8> %[[INS12]], i8 %[[LD 13]], i32 13
233 ; CHECK-NEXT: %[[GEP14:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 14
234 ; CHECK-NEXT: %[[LD14:[0-9]+]] = load i8* %[[GEP14]], align 2
235 ; CHECK-NEXT: %[[INS14:[0-9]+]] = insertelement <16 x i8> %[[INS13]], i8 %[[LD 14]], i32 14
236 ; CHECK-NEXT: %[[GEP15:[0-9]+]] = getelementptr inbounds i8* %[[BASE]], i32 15
237 ; CHECK-NEXT: %[[LD15:[0-9]+]] = load i8* %[[GEP15]], align 1
238 ; CHECK-NEXT: %[[INS15:[0-9]+]] = insertelement <16 x i8> %[[INS14]], i8 %[[LD 15]], i32 15
239 ; CHECK-NEXT: ret <16 x i8> %[[INS15]]
240 %loaded = load <16 x i8>* %loc
241 ret <16 x i8> %loaded
242 }
243
244
245 ; Store.
246
247 define void @test_store_4xi1(<4 x i1> %val, <4 x i1>* %loc) {
248 ; CHECK: @test_store_4xi1
249 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <4 x i1>* %loc to i1*
250 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 0
251 ; CHECK-NEXT: %[[EXT0:[0-9]+]] = extractelement <4 x i1> %val, i32 0
252 ; CHECK-NEXT: store i1 %[[EXT0]], i1* %[[GEP0]], align 4
253 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 1
254 ; CHECK-NEXT: %[[EXT1:[0-9]+]] = extractelement <4 x i1> %val, i32 1
255 ; CHECK-NEXT: store i1 %[[EXT1]], i1* %[[GEP1]], align 1
256 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 2
257 ; CHECK-NEXT: %[[EXT2:[0-9]+]] = extractelement <4 x i1> %val, i32 2
258 ; CHECK-NEXT: store i1 %[[EXT2]], i1* %[[GEP2]], align 2
259 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i1* %[[BASE]], i32 3
260 ; CHECK-NEXT: %[[EXT3:[0-9]+]] = extractelement <4 x i1> %val, i32 3
261 ; CHECK-NEXT: store i1 %[[EXT3]], i1* %[[GEP3]], align 1
262 ; CHECK-NEXT: ret void
263 store <4 x i1> %val, <4 x i1>* %loc
264 ret void
265 }
266
267 define void @test_store_4xi32(<4 x i32> %val, <4 x i32>* %loc) {
268 ; CHECK: @test_store_4xi32
269 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <4 x i32>* %loc to i32*
270 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 0
271 ; CHECK-NEXT: %[[EXT0:[0-9]+]] = extractelement <4 x i32> %val, i32 0
272 ; CHECK-NEXT: store i32 %[[EXT0]], i32* %[[GEP0]], align 4
273 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 1
274 ; CHECK-NEXT: %[[EXT1:[0-9]+]] = extractelement <4 x i32> %val, i32 1
275 ; CHECK-NEXT: store i32 %[[EXT1]], i32* %[[GEP1]], align 4
276 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 2
277 ; CHECK-NEXT: %[[EXT2:[0-9]+]] = extractelement <4 x i32> %val, i32 2
278 ; CHECK-NEXT: store i32 %[[EXT2]], i32* %[[GEP2]], align 4
279 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds i32* %[[BASE]], i32 3
280 ; CHECK-NEXT: %[[EXT3:[0-9]+]] = extractelement <4 x i32> %val, i32 3
281 ; CHECK-NEXT: store i32 %[[EXT3]], i32* %[[GEP3]], align 4
282 ; CHECK-NEXT: ret void
283 store <4 x i32> %val, <4 x i32>* %loc
284 ret void
285 }
286
287 define void @test_store_4xfloat(<4 x float> %val, <4 x float>* %loc) {
288 ; CHECK: @test_store_4xfloat
289 ; CHECK-NEXT: %[[BASE:[0-9]+]] = bitcast <4 x float>* %loc to float*
290 ; CHECK-NEXT: %[[GEP0:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 0
291 ; CHECK-NEXT: %[[EXT0:[0-9]+]] = extractelement <4 x float> %val, i32 0
292 ; CHECK-NEXT: store float %[[EXT0]], float* %[[GEP0]], align 4
293 ; CHECK-NEXT: %[[GEP1:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 1
294 ; CHECK-NEXT: %[[EXT1:[0-9]+]] = extractelement <4 x float> %val, i32 1
295 ; CHECK-NEXT: store float %[[EXT1]], float* %[[GEP1]], align 4
296 ; CHECK-NEXT: %[[GEP2:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 2
297 ; CHECK-NEXT: %[[EXT2:[0-9]+]] = extractelement <4 x float> %val, i32 2
298 ; CHECK-NEXT: store float %[[EXT2]], float* %[[GEP2]], align 4
299 ; CHECK-NEXT: %[[GEP3:[0-9]+]] = getelementptr inbounds float* %[[BASE]], i32 3
300 ; CHECK-NEXT: %[[EXT3:[0-9]+]] = extractelement <4 x float> %val, i32 3
301 ; CHECK-NEXT: store float %[[EXT3]], float* %[[GEP3]], align 4
302 ; CHECK-NEXT: ret void
303 store <4 x float> %val, <4 x float>* %loc
304 ret void
305 }
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