test/NaCl/Bitcode/vector.ll - Issue 221693002: PNaCl: Add support for GCC/LLVM vector extensions

Side by Side Diff

Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.

Keyboard Shortcuts

	File
u :	up to issue
j / k :	jump to file after / before current file
J / K :	jump to next file with a comment after / before current file
	Side-by-side diff
i :	toggle intra-line diffs
e :	expand all comments
c :	collapse all comments
s :	toggle showing all comments
n / p :	next / previous diff chunk or comment
N / P :	next / previous comment
<Up> / <Down> :	next / previous line

	Issue
u :	up to list of issues
j / k :	jump to patch after / before current patch
o / <Enter> :	open current patch in side-by-side view
i :	open current patch in unified diff view

	Issue List
j / k :	jump to issue after / before current issue
o / <Enter> :	open current issue

Side by Side Diff: test/NaCl/Bitcode/vector.ll

Issue 221693002: PNaCl: Add support for GCC/LLVM vector extensions (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master

Patch Set: Address dschuff's comments. Created 6 years, 8 months ago

Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.

Jump to:

View unified diff | Download patch

OLD	NEW
(Empty)
	1 ; Tests that vector operations survive through PNaCl bitcode files.

	2

	3 ; RUN: llvm-as < %s \| pnacl-freeze \| pnacl-thaw \| llvm-dis - \

	4 ; RUN: \| FileCheck %s

	5

	6 define internal void @binops() { ; CHECK-LABEL: binops

	7 %1 = add <4 x i32> undef, undef ; CHECK-NEXT: %1 = add <4 x i32> undef, un def

	8 %2 = fadd <4 x float> undef, undef ; CHECK-NEXT: %2 = fadd <4 x float> undef, undef

	9 %3 = sub <4 x i32> undef, undef ; CHECK-NEXT: %3 = sub <4 x i32> undef, un def

	10 %4 = fsub <4 x float> undef, undef ; CHECK-NEXT: %4 = fsub <4 x float> undef, undef

	11 %5 = mul <4 x i32> undef, undef ; CHECK-NEXT: %5 = mul <4 x i32> undef, un def

	12 %6 = fmul <4 x float> undef, undef ; CHECK-NEXT: %6 = fmul <4 x float> undef, undef

	13 %7 = udiv <4 x i32> undef, undef ; CHECK-NEXT: %7 = udiv <4 x i32> undef, u ndef

	14 %8 = sdiv <4 x i32> undef, undef ; CHECK-NEXT: %8 = sdiv <4 x i32> undef, u ndef

	15 %9 = fdiv <4 x float> undef, undef ; CHECK-NEXT: %9 = fdiv <4 x float> undef, undef

	16 %10 = urem <4 x i32> undef, undef ; CHECK-NEXT: %10 = urem <4 x i32> undef, undef

	17 %11 = srem <4 x i32> undef, undef ; CHECK-NEXT: %11 = srem <4 x i32> undef, undef

	18 %12 = frem <4 x float> undef, undef ; CHECK-NEXT: %12 = frem <4 x float> undef , undef

	19 %13 = shl <4 x i32> undef, undef ; CHECK-NEXT: %13 = shl <4 x i32> undef, u ndef

	20 %14 = lshr <4 x i32> undef, undef ; CHECK-NEXT: %14 = lshr <4 x i32> undef, undef

	21 %15 = ashr <4 x i32> undef, undef ; CHECK-NEXT: %15 = ashr <4 x i32> undef, undef

	22 %16 = and <4 x i32> undef, undef ; CHECK-NEXT: %16 = and <4 x i32> undef, u ndef

	23 %17 = or <4 x i32> undef, undef ; CHECK-NEXT: %17 = or <4 x i32> undef, un def

	24 %18 = xor <4 x i32> undef, undef ; CHECK-NEXT: %18 = xor <4 x i32> undef, u ndef

	25 ret void ; CHECK-NEXT: ret void

	26 }

	27

	28 define internal void @insert_extract() { ; CHECK-LABEL: insert_extract

	29 %1 = extractelement <4 x i32> undef, i32 0 ; CHECK-NEXT: %1 = extractele ment <4 x i32> undef, i32 0

	30 %2 = extractelement <4 x i32> undef, i32 1 ; CHECK-NEXT: %2 = extractele ment <4 x i32> undef, i32 1

	31 %3 = extractelement <4 x i32> undef, i32 2 ; CHECK-NEXT: %3 = extractele ment <4 x i32> undef, i32 2

	32 %4 = extractelement <4 x i32> undef, i32 3 ; CHECK-NEXT: %4 = extractele ment <4 x i32> undef, i32 3

	33 %5 = insertelement <4 x i32> undef, i32 1, i32 0 ; CHECK-NEXT: %5 = insertelem ent <4 x i32> undef, i32 1, i32 0

	34 %6 = insertelement <4 x i32> undef, i32 1, i32 1 ; CHECK-NEXT: %6 = insertelem ent <4 x i32> undef, i32 1, i32 1

	35 %7 = insertelement <4 x i32> undef, i32 1, i32 2 ; CHECK-NEXT: %7 = insertelem ent <4 x i32> undef, i32 1, i32 2

	36 %8 = insertelement <4 x i32> undef, i32 1, i32 3 ; CHECK-NEXT: %8 = insertelem ent <4 x i32> undef, i32 1, i32 3

	37 ret void ; CHECK-NEXT: ret void

	38 }

OLD	NEW