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Side by Side Diff: src/compiler/s390/code-generator-s390.cc

Issue 2216883003: S390: Decouple TF Operator kS390_And/Or/Xor/Not to 32/64 (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 4 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/ast/scopes.h" 7 #include "src/ast/scopes.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
(...skipping 261 matching lines...) Expand 10 before | Expand all | Expand 10 after
272 do { \ 272 do { \
273 __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \ 273 __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
274 } while (0) 274 } while (0)
275 275
276 #define ASSEMBLE_FLOAT_BINOP(asm_instr) \ 276 #define ASSEMBLE_FLOAT_BINOP(asm_instr) \
277 do { \ 277 do { \
278 __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \ 278 __ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0), \
279 i.InputDoubleRegister(1)); \ 279 i.InputDoubleRegister(1)); \
280 } while (0) 280 } while (0)
281 281
282 #define ASSEMBLE_BINOP(asm_instr_reg, asm_instr_imm) \ 282 #define ASSEMBLE_BINOP(asm_instr) \
283 do { \ 283 do { \
284 if (HasRegisterInput(instr, 1)) { \ 284 if (HasRegisterInput(instr, 1)) { \
285 __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \ 285 __ asm_instr(i.OutputRegister(), i.InputRegister(0), \
286 i.InputRegister(1)); \ 286 i.InputRegister(1)); \
287 } else { \ 287 } else { \
288 __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \ 288 __ asm_instr(i.OutputRegister(), i.InputRegister(0), \
289 i.InputImmediate(1)); \ 289 i.InputImmediate(1)); \
290 } \ 290 } \
291 } while (0) 291 } while (0)
292 292
293 #define ASSEMBLE_BINOP_INT(asm_instr_reg, asm_instr_imm) \ 293 #define ASSEMBLE_BINOP_INT(asm_instr_reg, asm_instr_imm) \
294 do { \ 294 do { \
295 if (HasRegisterInput(instr, 1)) { \ 295 if (HasRegisterInput(instr, 1)) { \
296 __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \ 296 __ asm_instr_reg(i.OutputRegister(), i.InputRegister(0), \
297 i.InputRegister(1)); \ 297 i.InputRegister(1)); \
298 } else { \ 298 } else { \
299 __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \ 299 __ asm_instr_imm(i.OutputRegister(), i.InputRegister(0), \
300 i.InputInt32(1)); \ 300 i.InputInt32(1)); \
(...skipping 678 matching lines...) Expand 10 before | Expand all | Expand 10 after
979 __ bind(ool->exit()); 979 __ bind(ool->exit());
980 break; 980 break;
981 } 981 }
982 case kArchStackSlot: { 982 case kArchStackSlot: {
983 FrameOffset offset = 983 FrameOffset offset =
984 frame_access_state()->GetFrameOffset(i.InputInt32(0)); 984 frame_access_state()->GetFrameOffset(i.InputInt32(0));
985 __ AddP(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp, 985 __ AddP(i.OutputRegister(), offset.from_stack_pointer() ? sp : fp,
986 Operand(offset.offset())); 986 Operand(offset.offset()));
987 break; 987 break;
988 } 988 }
989 case kS390_And: 989 case kS390_And32:
990 ASSEMBLE_BINOP(AndP, AndP); 990 ASSEMBLE_BINOP(And);
991 break; 991 break;
992 case kS390_Or: 992 case kS390_And64:
993 ASSEMBLE_BINOP(OrP, OrP); 993 ASSEMBLE_BINOP(AndP);
JoranSiu 2016/08/05 13:23:40 Instead of using AndP masm routines for the 64-bit
john.yan 2016/08/05 14:26:42 We don't have a And64 for now. And given that And6
994 break; 994 break;
995 case kS390_Xor: 995 case kS390_Or32:
996 ASSEMBLE_BINOP(XorP, XorP); 996 ASSEMBLE_BINOP(Or);
997 case kS390_Or64:
998 ASSEMBLE_BINOP(OrP);
999 break;
1000 case kS390_Xor32:
1001 ASSEMBLE_BINOP(Xor);
1002 break;
1003 case kS390_Xor64:
1004 ASSEMBLE_BINOP(XorP);
997 break; 1005 break;
998 case kS390_ShiftLeft32: 1006 case kS390_ShiftLeft32:
999 if (HasRegisterInput(instr, 1)) { 1007 if (HasRegisterInput(instr, 1)) {
1000 if (i.OutputRegister().is(i.InputRegister(1)) && 1008 if (i.OutputRegister().is(i.InputRegister(1)) &&
1001 !CpuFeatures::IsSupported(DISTINCT_OPS)) { 1009 !CpuFeatures::IsSupported(DISTINCT_OPS)) {
1002 __ LoadRR(kScratchReg, i.InputRegister(1)); 1010 __ LoadRR(kScratchReg, i.InputRegister(1));
1003 __ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg); 1011 __ ShiftLeft(i.OutputRegister(), i.InputRegister(0), kScratchReg);
1004 } else { 1012 } else {
1005 ASSEMBLE_BINOP(ShiftLeft, ShiftLeft); 1013 ASSEMBLE_BINOP(ShiftLeft);
1006 } 1014 }
1007 } else { 1015 } else {
1008 ASSEMBLE_BINOP(ShiftLeft, ShiftLeft); 1016 ASSEMBLE_BINOP(ShiftLeft);
1009 } 1017 }
1010 __ LoadlW(i.OutputRegister(0), i.OutputRegister(0)); 1018 __ LoadlW(i.OutputRegister(0), i.OutputRegister(0));
1011 break; 1019 break;
1012 #if V8_TARGET_ARCH_S390X 1020 #if V8_TARGET_ARCH_S390X
1013 case kS390_ShiftLeft64: 1021 case kS390_ShiftLeft64:
1014 ASSEMBLE_BINOP(sllg, sllg); 1022 ASSEMBLE_BINOP(sllg);
1015 break; 1023 break;
1016 #endif 1024 #endif
1017 case kS390_ShiftRight32: 1025 case kS390_ShiftRight32:
1018 if (HasRegisterInput(instr, 1)) { 1026 if (HasRegisterInput(instr, 1)) {
1019 if (i.OutputRegister().is(i.InputRegister(1)) && 1027 if (i.OutputRegister().is(i.InputRegister(1)) &&
1020 !CpuFeatures::IsSupported(DISTINCT_OPS)) { 1028 !CpuFeatures::IsSupported(DISTINCT_OPS)) {
1021 __ LoadRR(kScratchReg, i.InputRegister(1)); 1029 __ LoadRR(kScratchReg, i.InputRegister(1));
1022 __ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg); 1030 __ ShiftRight(i.OutputRegister(), i.InputRegister(0), kScratchReg);
1023 } else { 1031 } else {
1024 ASSEMBLE_BINOP(ShiftRight, ShiftRight); 1032 ASSEMBLE_BINOP(ShiftRight);
1025 } 1033 }
1026 } else { 1034 } else {
1027 ASSEMBLE_BINOP(ShiftRight, ShiftRight); 1035 ASSEMBLE_BINOP(ShiftRight);
1028 } 1036 }
1029 __ LoadlW(i.OutputRegister(0), i.OutputRegister(0)); 1037 __ LoadlW(i.OutputRegister(0), i.OutputRegister(0));
1030 break; 1038 break;
1031 #if V8_TARGET_ARCH_S390X 1039 #if V8_TARGET_ARCH_S390X
1032 case kS390_ShiftRight64: 1040 case kS390_ShiftRight64:
1033 ASSEMBLE_BINOP(srlg, srlg); 1041 ASSEMBLE_BINOP(srlg);
1034 break; 1042 break;
1035 #endif 1043 #endif
1036 case kS390_ShiftRightArith32: 1044 case kS390_ShiftRightArith32:
1037 if (HasRegisterInput(instr, 1)) { 1045 if (HasRegisterInput(instr, 1)) {
1038 if (i.OutputRegister().is(i.InputRegister(1)) && 1046 if (i.OutputRegister().is(i.InputRegister(1)) &&
1039 !CpuFeatures::IsSupported(DISTINCT_OPS)) { 1047 !CpuFeatures::IsSupported(DISTINCT_OPS)) {
1040 __ LoadRR(kScratchReg, i.InputRegister(1)); 1048 __ LoadRR(kScratchReg, i.InputRegister(1));
1041 __ ShiftRightArith(i.OutputRegister(), i.InputRegister(0), 1049 __ ShiftRightArith(i.OutputRegister(), i.InputRegister(0),
1042 kScratchReg); 1050 kScratchReg);
1043 } else { 1051 } else {
1044 ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith); 1052 ASSEMBLE_BINOP(ShiftRightArith);
1045 } 1053 }
1046 } else { 1054 } else {
1047 ASSEMBLE_BINOP(ShiftRightArith, ShiftRightArith); 1055 ASSEMBLE_BINOP(ShiftRightArith);
1048 } 1056 }
1049 __ LoadlW(i.OutputRegister(), i.OutputRegister()); 1057 __ LoadlW(i.OutputRegister(), i.OutputRegister());
1050 break; 1058 break;
1051 #if V8_TARGET_ARCH_S390X 1059 #if V8_TARGET_ARCH_S390X
1052 case kS390_ShiftRightArith64: 1060 case kS390_ShiftRightArith64:
1053 ASSEMBLE_BINOP(srag, srag); 1061 ASSEMBLE_BINOP(srag);
1054 break; 1062 break;
1055 #endif 1063 #endif
1056 #if !V8_TARGET_ARCH_S390X 1064 #if !V8_TARGET_ARCH_S390X
1057 case kS390_AddPair: 1065 case kS390_AddPair:
1058 // i.InputRegister(0) ... left low word. 1066 // i.InputRegister(0) ... left low word.
1059 // i.InputRegister(1) ... left high word. 1067 // i.InputRegister(1) ... left high word.
1060 // i.InputRegister(2) ... right low word. 1068 // i.InputRegister(2) ... right low word.
1061 // i.InputRegister(3) ... right high word. 1069 // i.InputRegister(3) ... right high word.
1062 __ AddLogical32(i.OutputRegister(0), i.InputRegister(0), 1070 __ AddLogical32(i.OutputRegister(0), i.InputRegister(0),
1063 i.InputRegister(2)); 1071 i.InputRegister(2));
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
1134 case kS390_RotRight64: 1142 case kS390_RotRight64:
1135 if (HasRegisterInput(instr, 1)) { 1143 if (HasRegisterInput(instr, 1)) {
1136 __ LoadComplementRR(kScratchReg, i.InputRegister(1)); 1144 __ LoadComplementRR(kScratchReg, i.InputRegister(1));
1137 __ rllg(i.OutputRegister(), i.InputRegister(0), kScratchReg); 1145 __ rllg(i.OutputRegister(), i.InputRegister(0), kScratchReg);
1138 } else { 1146 } else {
1139 __ rllg(i.OutputRegister(), i.InputRegister(0), 1147 __ rllg(i.OutputRegister(), i.InputRegister(0),
1140 Operand(64 - i.InputInt32(1))); 1148 Operand(64 - i.InputInt32(1)));
1141 } 1149 }
1142 break; 1150 break;
1143 #endif 1151 #endif
1144 case kS390_Not: 1152 case kS390_Not32:
1145 __ LoadRR(i.OutputRegister(), i.InputRegister(0)); 1153 __ Not32(i.OutputRegister(), i.InputRegister(0));
1146 __ NotP(i.OutputRegister()); 1154 break;
1155 case kS390_Not64:
1156 __ Not64(i.OutputRegister(), i.InputRegister(0));
1147 break; 1157 break;
1148 case kS390_RotLeftAndMask32: 1158 case kS390_RotLeftAndMask32:
1149 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) { 1159 if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
1150 int shiftAmount = i.InputInt32(1); 1160 int shiftAmount = i.InputInt32(1);
1151 int endBit = 63 - i.InputInt32(3); 1161 int endBit = 63 - i.InputInt32(3);
1152 int startBit = 63 - i.InputInt32(2); 1162 int startBit = 63 - i.InputInt32(2);
1153 __ rll(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount)); 1163 __ rll(i.OutputRegister(), i.InputRegister(0), Operand(shiftAmount));
1154 __ risbg(i.OutputRegister(), i.OutputRegister(), Operand(startBit), 1164 __ risbg(i.OutputRegister(), i.OutputRegister(), Operand(startBit),
1155 Operand(endBit), Operand::Zero(), true); 1165 Operand(endBit), Operand::Zero(), true);
1156 } else { 1166 } else {
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
1198 __ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit)); 1208 __ sllg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit));
1199 } 1209 }
1200 break; 1210 break;
1201 #endif 1211 #endif
1202 case kS390_Add: 1212 case kS390_Add:
1203 #if V8_TARGET_ARCH_S390X 1213 #if V8_TARGET_ARCH_S390X
1204 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) { 1214 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) {
1205 ASSEMBLE_ADD_WITH_OVERFLOW(); 1215 ASSEMBLE_ADD_WITH_OVERFLOW();
1206 } else { 1216 } else {
1207 #endif 1217 #endif
1208 ASSEMBLE_BINOP(AddP, AddP); 1218 ASSEMBLE_BINOP(AddP);
1209 #if V8_TARGET_ARCH_S390X 1219 #if V8_TARGET_ARCH_S390X
1210 } 1220 }
1211 #endif 1221 #endif
1212 break; 1222 break;
1213 case kS390_AddWithOverflow32: 1223 case kS390_AddWithOverflow32:
1214 ASSEMBLE_ADD_WITH_OVERFLOW32(); 1224 ASSEMBLE_ADD_WITH_OVERFLOW32();
1215 break; 1225 break;
1216 case kS390_AddFloat: 1226 case kS390_AddFloat:
1217 // Ensure we don't clobber right/InputReg(1) 1227 // Ensure we don't clobber right/InputReg(1)
1218 if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { 1228 if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
(...skipping 13 matching lines...) Expand all
1232 __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); 1242 __ ldr(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
1233 __ adbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1)); 1243 __ adbr(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
1234 } 1244 }
1235 break; 1245 break;
1236 case kS390_Sub: 1246 case kS390_Sub:
1237 #if V8_TARGET_ARCH_S390X 1247 #if V8_TARGET_ARCH_S390X
1238 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) { 1248 if (FlagsModeField::decode(instr->opcode()) != kFlags_none) {
1239 ASSEMBLE_SUB_WITH_OVERFLOW(); 1249 ASSEMBLE_SUB_WITH_OVERFLOW();
1240 } else { 1250 } else {
1241 #endif 1251 #endif
1242 ASSEMBLE_BINOP(SubP, SubP); 1252 ASSEMBLE_BINOP(SubP);
1243 #if V8_TARGET_ARCH_S390X 1253 #if V8_TARGET_ARCH_S390X
1244 } 1254 }
1245 #endif 1255 #endif
1246 break; 1256 break;
1247 case kS390_SubWithOverflow32: 1257 case kS390_SubWithOverflow32:
1248 ASSEMBLE_SUB_WITH_OVERFLOW32(); 1258 ASSEMBLE_SUB_WITH_OVERFLOW32();
1249 break; 1259 break;
1250 case kS390_SubFloat: 1260 case kS390_SubFloat:
1251 // OutputDoubleReg() = i.InputDoubleRegister(0) - i.InputDoubleRegister(1) 1261 // OutputDoubleReg() = i.InputDoubleRegister(0) - i.InputDoubleRegister(1)
1252 if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) { 1262 if (i.OutputDoubleRegister().is(i.InputDoubleRegister(1))) {
(...skipping 1197 matching lines...) Expand 10 before | Expand all | Expand 10 after
2450 padding_size -= 2; 2460 padding_size -= 2;
2451 } 2461 }
2452 } 2462 }
2453 } 2463 }
2454 2464
2455 #undef __ 2465 #undef __
2456 2466
2457 } // namespace compiler 2467 } // namespace compiler
2458 } // namespace internal 2468 } // namespace internal
2459 } // namespace v8 2469 } // namespace v8
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