Subzero: Fix sign issues for inlined memset lowering.

tests_lit/llvm2ice_tests/nacl-mem-intrinsics.ll

 ; This tests the NaCl intrinsics memset, memcpy and memmove.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 --sandbox -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 --sandbox -i %s --args -Om1 --fmem-intrin-opt \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 --sandbox -i %s --args -Om1 \
@@ skipping 415 matching lines @@
 ; CHECK: mov DWORD PTR [{{.*}}+0x4],0x20202020
 ; CHECK: mov DWORD PTR [{{.*}}],0x20202020
 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x8],0x20
 ; CHECK-NOT: mov
 ; OM1-LABEL: test_memset_const_val_len_mid
 ; OM1: call {{.*}} R_{{.*}} memset
 ; ARM32-LABEL: test_memset_const_val_len_mid
 ; ARM32: uxtb
 ; ARM32: bl {{.*}} memset
 
+; Same as above, but with a negative value.
+define internal void @test_memset_const_neg_val_len_mid(i32 %iptr_dst) {
+entry:
+  %dst = inttoptr i32 %iptr_dst to i8*
+  call void @llvm.memset.p0i8.i32(i8* %dst, i8 -128, i32 9, i32 1, i1 false)
+  ret void
+}
+; CHECK-LABEL: test_memset_const_neg_val_len_mid
+; CHECK: mov DWORD PTR [{{.*}}+0x4],0x80808080
+; CHECK: mov DWORD PTR [{{.*}}],0x80808080
+; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x8],0x80
+; CHECK-NOT: mov
+; OM1-LABEL: test_memset_const_neg_val_len_mid
+; OM1: call {{.*}} R_{{.*}} memset
+; ARM32-LABEL: test_memset_const_neg_val_len_mid
+; ARM32: uxtb
+; ARM32: bl {{.*}} memset
+
 define internal void @test_memset_zero_const_len_small(i32 %iptr_dst) {
 entry:
   %dst = inttoptr i32 %iptr_dst to i8*
   call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 12, i32 1, i1 false)
   ret void
 }
 ; CHECK-LABEL: test_memset_zero_const_len_small
 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]]
 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[ZERO]]
 ; CHECK-NEXT: mov DWORD PTR [{{.*}}+0x8],0x0
@@ skipping 48 matching lines @@
 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]]
 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0x10],[[ZERO]]
 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[ZERO]]
 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x20],0x0
 ; CHECK-NOT: mov
 ; OM1-LABEL: test_memset_zero_const_len_large
 ; OM1: call {{.*}} R_{{.*}} memset
 ; ARM32-LABEL: test_memset_zero_const_len_large
 ; ARM32: uxtb
 ; ARM32: bl {{.*}} memset