Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(1178)

Side by Side Diff: src/IceTargetLoweringX86BaseImpl.h

Issue 2215553002: Subzero: Fix sign issues for inlined memset lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | tests_lit/llvm2ice_tests/nacl-mem-intrinsics.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 4962 matching lines...) Expand 10 before | Expand all | Expand 10 after
4973 // Unlikely, but nothing to do if it does happen 4973 // Unlikely, but nothing to do if it does happen
4974 if (IsCountConst && CountValue == 0) 4974 if (IsCountConst && CountValue == 0)
4975 return; 4975 return;
4976 4976
4977 // TODO(ascull): if the count is constant but val is not it would be possible 4977 // TODO(ascull): if the count is constant but val is not it would be possible
4978 // to inline by spreading the value across 4 bytes and accessing subregs e.g. 4978 // to inline by spreading the value across 4 bytes and accessing subregs e.g.
4979 // eax, ax and al. 4979 // eax, ax and al.
4980 if (shouldOptimizeMemIntrins() && IsCountConst && IsValConst) { 4980 if (shouldOptimizeMemIntrins() && IsCountConst && IsValConst) {
4981 Variable *Base = nullptr; 4981 Variable *Base = nullptr;
4982 Variable *VecReg = nullptr; 4982 Variable *VecReg = nullptr;
4983 const uint32_t MaskValue = (ValValue & 0xff);
4983 const uint32_t SpreadValue = 4984 const uint32_t SpreadValue =
4984 (ValValue << 24) | (ValValue << 16) | (ValValue << 8) | ValValue; 4985 (MaskValue << 24) | (MaskValue << 16) | (MaskValue << 8) | MaskValue;
4985 4986
4986 auto lowerSet = [this, &Base, SpreadValue, &VecReg](Type Ty, 4987 auto lowerSet = [this, &Base, SpreadValue, &VecReg](Type Ty,
4987 uint32_t OffsetAmt) { 4988 uint32_t OffsetAmt) {
4988 assert(Base != nullptr); 4989 assert(Base != nullptr);
4989 Constant *Offset = OffsetAmt ? Ctx->getConstantInt32(OffsetAmt) : nullptr; 4990 Constant *Offset = OffsetAmt ? Ctx->getConstantInt32(OffsetAmt) : nullptr;
4990 4991
4991 // TODO(ascull): is 64-bit better with vector or scalar movq? 4992 // TODO(ascull): is 64-bit better with vector or scalar movq?
4992 auto *Mem = X86OperandMem::create(Func, Ty, Base, Offset); 4993 auto *Mem = X86OperandMem::create(Func, Ty, Base, Offset);
4993 if (isVectorType(Ty)) { 4994 if (isVectorType(Ty)) {
4994 assert(VecReg != nullptr); 4995 assert(VecReg != nullptr);
(...skipping 3088 matching lines...) Expand 10 before | Expand all | Expand 10 after
8083 emitGlobal(*Var, SectionSuffix); 8084 emitGlobal(*Var, SectionSuffix);
8084 } 8085 }
8085 } 8086 }
8086 } break; 8087 } break;
8087 } 8088 }
8088 } 8089 }
8089 } // end of namespace X86NAMESPACE 8090 } // end of namespace X86NAMESPACE
8090 } // end of namespace Ice 8091 } // end of namespace Ice
8091 8092
8092 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H 8093 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H
OLDNEW
« no previous file with comments | « no previous file | tests_lit/llvm2ice_tests/nacl-mem-intrinsics.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698