Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(556)

Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 2215403002: [turbofan] Make Float32Neg and Float64Neg mandatory operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after
59 V(MipsAddD) \ 59 V(MipsAddD) \
60 V(MipsSubD) \ 60 V(MipsSubD) \
61 V(MipsSubPreserveNanD) \ 61 V(MipsSubPreserveNanD) \
62 V(MipsMulD) \ 62 V(MipsMulD) \
63 V(MipsDivD) \ 63 V(MipsDivD) \
64 V(MipsModD) \ 64 V(MipsModD) \
65 V(MipsAbsD) \ 65 V(MipsAbsD) \
66 V(MipsSqrtD) \ 66 V(MipsSqrtD) \
67 V(MipsMaxD) \ 67 V(MipsMaxD) \
68 V(MipsMinD) \ 68 V(MipsMinD) \
69 V(MipsNegS) \
70 V(MipsNegD) \
69 V(MipsAddPair) \ 71 V(MipsAddPair) \
70 V(MipsSubPair) \ 72 V(MipsSubPair) \
71 V(MipsMulPair) \ 73 V(MipsMulPair) \
72 V(MipsFloat32RoundDown) \ 74 V(MipsFloat32RoundDown) \
73 V(MipsFloat32RoundTruncate) \ 75 V(MipsFloat32RoundTruncate) \
74 V(MipsFloat32RoundUp) \ 76 V(MipsFloat32RoundUp) \
75 V(MipsFloat32RoundTiesEven) \ 77 V(MipsFloat32RoundTiesEven) \
76 V(MipsFloat64RoundDown) \ 78 V(MipsFloat64RoundDown) \
77 V(MipsFloat64RoundTruncate) \ 79 V(MipsFloat64RoundTruncate) \
78 V(MipsFloat64RoundUp) \ 80 V(MipsFloat64RoundUp) \
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after
142 #define TARGET_ADDRESSING_MODE_LIST(V) \ 144 #define TARGET_ADDRESSING_MODE_LIST(V) \
143 V(MRI) /* [%r0 + K] */ \ 145 V(MRI) /* [%r0 + K] */ \
144 V(MRR) /* [%r0 + %r1] */ 146 V(MRR) /* [%r0 + %r1] */
145 147
146 148
147 } // namespace compiler 149 } // namespace compiler
148 } // namespace internal 150 } // namespace internal
149 } // namespace v8 151 } // namespace v8
150 152
151 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 153 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
OLDNEW
« no previous file with comments | « src/compiler/mips/code-generator-mips.cc ('k') | src/compiler/mips/instruction-selector-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698