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| 1 // | 1 // |
| 2 // The Subzero Code Generator | 2 // The Subzero Code Generator |
| 3 // | 3 // |
| 4 // This file is distributed under the University of Illinois Open Source | 4 // This file is distributed under the University of Illinois Open Source |
| 5 // License. See LICENSE.TXT for details. | 5 // License. See LICENSE.TXT for details. |
| 6 // | 6 // |
| 7 //===----------------------------------------------------------------------===// | 7 //===----------------------------------------------------------------------===// |
| 8 /// | 8 /// |
| 9 /// \file | 9 /// \file |
| 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost | 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost |
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| 689 } | 689 } |
| 690 RegisterArg->setIsArg(); | 690 RegisterArg->setIsArg(); |
| 691 Arg->setIsArg(false); | 691 Arg->setIsArg(false); |
| 692 Args[I] = RegisterArg; | 692 Args[I] = RegisterArg; |
| 693 switch (Ty) { | 693 switch (Ty) { |
| 694 default: { RegisterArg->setRegNum(RegNum); } break; | 694 default: { RegisterArg->setRegNum(RegNum); } break; |
| 695 case IceType_i64: { | 695 case IceType_i64: { |
| 696 auto *RegisterArg64 = llvm::cast<Variable64On32>(RegisterArg); | 696 auto *RegisterArg64 = llvm::cast<Variable64On32>(RegisterArg); |
| 697 RegisterArg64->initHiLo(Func); | 697 RegisterArg64->initHiLo(Func); |
| 698 RegisterArg64->getLo()->setRegNum( | 698 RegisterArg64->getLo()->setRegNum( |
| 699 RegNumT::fixme(RegMIPS32::getI64PairFirstGPRNum(RegNum))); | 699 RegNumT::fixme(RegMIPS32::get64PairFirstRegNum(RegNum))); |
| 700 RegisterArg64->getHi()->setRegNum( | 700 RegisterArg64->getHi()->setRegNum( |
| 701 RegNumT::fixme(RegMIPS32::getI64PairSecondGPRNum(RegNum))); | 701 RegNumT::fixme(RegMIPS32::get64PairSecondRegNum(RegNum))); |
| 702 } break; | 702 } break; |
| 703 } | 703 } |
| 704 Context.insert<InstAssign>(Arg, RegisterArg); | 704 Context.insert<InstAssign>(Arg, RegisterArg); |
| 705 } | 705 } |
| 706 } | 706 } |
| 707 | 707 |
| 708 Type TargetMIPS32::stackSlotType() { return IceType_i32; } | 708 Type TargetMIPS32::stackSlotType() { return IceType_i32; } |
| 709 | 709 |
| 710 // Helper function for addProlog(). | 710 // Helper function for addProlog(). |
| 711 // | 711 // |
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| 1703 applyStackAlignmentTy(ParameterAreaSizeBytes, Ty); | 1703 applyStackAlignmentTy(ParameterAreaSizeBytes, Ty); |
| 1704 StackArgs.push_back(std::make_pair(Arg, ParameterAreaSizeBytes)); | 1704 StackArgs.push_back(std::make_pair(Arg, ParameterAreaSizeBytes)); |
| 1705 ParameterAreaSizeBytes += typeWidthInBytesOnStack(Ty); | 1705 ParameterAreaSizeBytes += typeWidthInBytesOnStack(Ty); |
| 1706 continue; | 1706 continue; |
| 1707 } | 1707 } |
| 1708 | 1708 |
| 1709 if (Ty == IceType_i64) { | 1709 if (Ty == IceType_i64) { |
| 1710 Operand *Lo = loOperand(Arg); | 1710 Operand *Lo = loOperand(Arg); |
| 1711 Operand *Hi = hiOperand(Arg); | 1711 Operand *Hi = hiOperand(Arg); |
| 1712 GPRArgs.push_back( | 1712 GPRArgs.push_back( |
| 1713 std::make_pair(Lo, RegMIPS32::getI64PairFirstGPRNum(Reg))); | 1713 std::make_pair(Lo, RegMIPS32::get64PairFirstRegNum(Reg))); |
| 1714 GPRArgs.push_back( | 1714 GPRArgs.push_back( |
| 1715 std::make_pair(Hi, RegMIPS32::getI64PairSecondGPRNum(Reg))); | 1715 std::make_pair(Hi, RegMIPS32::get64PairSecondRegNum(Reg))); |
| 1716 } else if (isScalarIntegerType(Ty)) { | 1716 } else if (isScalarIntegerType(Ty)) { |
| 1717 GPRArgs.push_back(std::make_pair(Arg, Reg)); | 1717 GPRArgs.push_back(std::make_pair(Arg, Reg)); |
| 1718 } else { | 1718 } else { |
| 1719 FPArgs.push_back(std::make_pair(Arg, Reg)); | 1719 FPArgs.push_back(std::make_pair(Arg, Reg)); |
| 1720 } | 1720 } |
| 1721 } | 1721 } |
| 1722 | 1722 |
| 1723 // Adjust the parameter area so that the stack is aligned. It is assumed that | 1723 // Adjust the parameter area so that the stack is aligned. It is assumed that |
| 1724 // the stack is already aligned at the start of the calling sequence. | 1724 // the stack is already aligned at the start of the calling sequence. |
| 1725 ParameterAreaSizeBytes = applyStackAlignment(ParameterAreaSizeBytes); | 1725 ParameterAreaSizeBytes = applyStackAlignment(ParameterAreaSizeBytes); |
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| 2571 Str << "\t.set\t" | 2571 Str << "\t.set\t" |
| 2572 << "nomips16\n"; | 2572 << "nomips16\n"; |
| 2573 } | 2573 } |
| 2574 | 2574 |
| 2575 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; | 2575 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; |
| 2576 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; | 2576 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; |
| 2577 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 2577 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
| 2578 | 2578 |
| 2579 } // end of namespace MIPS32 | 2579 } // end of namespace MIPS32 |
| 2580 } // end of namespace Ice | 2580 } // end of namespace Ice |
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