Revert of simplify neon shifts

src/opts/SkNx_neon.h

 /*
  * Copyright 2015 Google Inc.
  *
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
 
 #ifndef SkNx_neon_DEFINED
 #define SkNx_neon_DEFINED
 
 #include <arm_neon.h>
 
 #define SKNX_IS_FAST
 
 // ARMv8 has vrndmq_f32 to floor 4 floats.  Here we emulate it:
 //   - roundtrip through integers via truncation
 //   - subtract 1 if that's too big (possible for negative values).
 // This restricts the domain of our inputs to a maximum somehwere around 2^31.  Seems plenty big.
 static inline float32x4_t armv7_vrndmq_f32(float32x4_t v) {
     float32x4_t roundtrip = vcvtq_f32_s32(vcvtq_s32_f32(v));
     uint32x4_t too_big = roundtrip > v;
     return roundtrip - (float32x4_t)vandq_u32(too_big, (uint32x4_t)vdupq_n_f32(1));
 }
 
+// Well, this is absurd.  The shifts require compile-time constant arguments.
+
+#define SHIFT8(op, v, bits) switch(bits) { \
+    case  1: return op(v,  1);  case  2: return op(v,  2);  case  3: return op(v,  3); \
+    case  4: return op(v,  4);  case  5: return op(v,  5);  case  6: return op(v,  6); \
+    case  7: return op(v,  7); \
+    } return fVec
+
+#define SHIFT16(op, v, bits) if (bits < 8) { SHIFT8(op, v, bits); } switch(bits) { \
+                                case  8: return op(v,  8);  case  9: return op(v,  9); \
+    case 10: return op(v, 10);  case 11: return op(v, 11);  case 12: return op(v, 12); \
+    case 13: return op(v, 13);  case 14: return op(v, 14);  case 15: return op(v, 15); \
+    } return fVec
+
+#define SHIFT32(op, v, bits) if (bits < 16) { SHIFT16(op, v, bits); } switch(bits) { \
+    case 16: return op(v, 16);  case 17: return op(v, 17);  case 18: return op(v, 18); \
+    case 19: return op(v, 19);  case 20: return op(v, 20);  case 21: return op(v, 21); \
+    case 22: return op(v, 22);  case 23: return op(v, 23);  case 24: return op(v, 24); \
+    case 25: return op(v, 25);  case 26: return op(v, 26);  case 27: return op(v, 27); \
+    case 28: return op(v, 28);  case 29: return op(v, 29);  case 30: return op(v, 30); \
+    case 31: return op(v, 31); } return fVec
+
 template <>
 class SkNx<2, float> {
 public:
     SkNx(float32x2_t vec) : fVec(vec) {}
 
     SkNx() {}
     SkNx(float a, float b) : fVec{a,b} {}
     SkNx(float v)          : fVec{v,v} {}
 
     static SkNx Load(const void* ptr) { return vld1_f32((const float*)ptr); }
@@ skipping 140 matching lines @@
     SkNx(uint16_t a, uint16_t b, uint16_t c, uint16_t d) : fVec{a,b,c,d} {}
     SkNx(uint16_t v)                                     : fVec{v,v,v,v} {}
 
     static SkNx Load(const void* ptr) { return vld1_u16((const uint16_t*)ptr); }
     void store(void* ptr) const { vst1_u16((uint16_t*)ptr, fVec); }
 
     SkNx operator + (const SkNx& o) const { return fVec + o.fVec; }
     SkNx operator - (const SkNx& o) const { return fVec - o.fVec; }
     SkNx operator * (const SkNx& o) const { return fVec * o.fVec; }
 
-    SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
-    SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
+    SkNx operator << (int bits) const { SHIFT16(vshl_n_u16, fVec, bits); }
+    SkNx operator >> (int bits) const { SHIFT16(vshr_n_u16, fVec, bits); }
 
     static SkNx Min(const SkNx& a, const SkNx& b) { return vmin_u16(a.fVec, b.fVec); }
 
     uint16_t operator[](int k) const { return fVec[k&3]; }
 
     SkNx thenElse(const SkNx& t, const SkNx& e) const {
         return vbsl_u16(fVec, t.fVec, e.fVec);
     }
 
     uint16x4_t fVec;
 };
 
 template <>
 class SkNx<8, uint16_t> {
 public:
     SkNx(const uint16x8_t& vec) : fVec(vec) {}
 
     SkNx() {}
     SkNx(uint16_t a, uint16_t b, uint16_t c, uint16_t d,
          uint16_t e, uint16_t f, uint16_t g, uint16_t h) : fVec{a,b,c,d,e,f,g,h} {}
     SkNx(uint16_t v)                                     : fVec{v,v,v,v,v,v,v,v} {}
 
     static SkNx Load(const void* ptr) { return vld1q_u16((const uint16_t*)ptr); }
     void store(void* ptr) const { vst1q_u16((uint16_t*)ptr, fVec); }
 
     SkNx operator + (const SkNx& o) const { return fVec + o.fVec; }
     SkNx operator - (const SkNx& o) const { return fVec - o.fVec; }
     SkNx operator * (const SkNx& o) const { return fVec * o.fVec; }
 
-    SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
-    SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
+    SkNx operator << (int bits) const { SHIFT16(vshlq_n_u16, fVec, bits); }
+    SkNx operator >> (int bits) const { SHIFT16(vshrq_n_u16, fVec, bits); }
 
     static SkNx Min(const SkNx& a, const SkNx& b) { return vminq_u16(a.fVec, b.fVec); }
 
     uint16_t operator[](int k) const { return fVec[k&7]; }
 
     SkNx thenElse(const SkNx& t, const SkNx& e) const {
         return vbslq_u16(fVec, t.fVec, e.fVec);
     }
 
     uint16x8_t fVec;
@@ skipping 67 matching lines @@
     void store(void* ptr) const { return vst1q_s32((int32_t*)ptr, fVec); }
 
     SkNx operator + (const SkNx& o) const { return fVec + o.fVec; }
     SkNx operator - (const SkNx& o) const { return fVec - o.fVec; }
     SkNx operator * (const SkNx& o) const { return fVec * o.fVec; }
 
     SkNx operator & (const SkNx& o) const { return fVec & o.fVec; }
     SkNx operator | (const SkNx& o) const { return fVec | o.fVec; }
     SkNx operator ^ (const SkNx& o) const { return fVec ^ o.fVec; }
 
-    SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
-    SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
+    SkNx operator << (int bits) const { SHIFT32(vshlq_n_s32, fVec, bits); }
+    SkNx operator >> (int bits) const { SHIFT32(vshrq_n_s32, fVec, bits); }
 
     SkNx operator == (const SkNx& o) const { return fVec == o.fVec; }
     SkNx operator <  (const SkNx& o) const { return fVec <  o.fVec; }
     SkNx operator >  (const SkNx& o) const { return fVec >  o.fVec; }
 
     static SkNx Min(const SkNx& a, const SkNx& b) { return vminq_s32(a.fVec, b.fVec); }
 
     int32_t operator[](int k) const { return fVec[k&3]; }
 
     SkNx thenElse(const SkNx& t, const SkNx& e) const {
@@ skipping 16 matching lines @@
     void store(void* ptr) const { return vst1q_u32((uint32_t*)ptr, fVec); }
 
     SkNx operator + (const SkNx& o) const { return fVec + o.fVec; }
     SkNx operator - (const SkNx& o) const { return fVec - o.fVec; }
     SkNx operator * (const SkNx& o) const { return fVec * o.fVec; }
 
     SkNx operator & (const SkNx& o) const { return fVec & o.fVec; }
     SkNx operator | (const SkNx& o) const { return fVec | o.fVec; }
     SkNx operator ^ (const SkNx& o) const { return fVec ^ o.fVec; }
 
-    SkNx operator << (int bits) const { return fVec << SkNx(bits).fVec; }
-    SkNx operator >> (int bits) const { return fVec >> SkNx(bits).fVec; }
+    SkNx operator << (int bits) const { SHIFT32(vshlq_n_u32, fVec, bits); }
+    SkNx operator >> (int bits) const { SHIFT32(vshrq_n_u32, fVec, bits); }
 
     SkNx operator == (const SkNx& o) const { return fVec == o.fVec; }
     SkNx operator <  (const SkNx& o) const { return fVec <  o.fVec; }
     SkNx operator >  (const SkNx& o) const { return fVec >  o.fVec; }
 
     static SkNx Min(const SkNx& a, const SkNx& b) { return vminq_u32(a.fVec, b.fVec); }
 
     uint32_t operator[](int k) const { return fVec[k&3]; }
 
     SkNx thenElse(const SkNx& t, const SkNx& e) const {
         return vbslq_u32(fVec, t.fVec, e.fVec);
     }
 
     uint32x4_t fVec;
 };
 
+#undef SHIFT32
+#undef SHIFT16
+#undef SHIFT8
+
 template<> inline Sk4i SkNx_cast<int32_t, float>(const Sk4f& src) {
     return vcvtq_s32_f32(src.fVec);
 
 }
 template<> inline Sk4f SkNx_cast<float, int32_t>(const Sk4i& src) {
     return vcvtq_f32_s32(src.fVec);
 }
 template<> inline Sk4f SkNx_cast<float, uint32_t>(const Sk4u& src) {
     return SkNx_cast<float>(Sk4i::Load(&src));
 }
@@ skipping 69 matching lines @@
     uint16x4x4_t rgba = {{
         r.fVec,
         g.fVec,
         b.fVec,
         a.fVec,
     }};
     vst4_u16((uint16_t*) dst, rgba);
 }
 
 #endif//SkNx_neon_DEFINED