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Issue 218623017: Fixed build (unused vars in release mode). (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1555 } 1555 }
1556 } 1556 }
1557 1557
1558 1558
1559 // TODO(svenpanne) Refactor this to avoid code duplication with DoFlooringDivI. 1559 // TODO(svenpanne) Refactor this to avoid code duplication with DoFlooringDivI.
1560 void LCodeGen::DoDivI(LDivI* instr) { 1560 void LCodeGen::DoDivI(LDivI* instr) {
1561 HBinaryOperation* hdiv = instr->hydrogen(); 1561 HBinaryOperation* hdiv = instr->hydrogen();
1562 Register dividend = ToRegister(instr->dividend()); 1562 Register dividend = ToRegister(instr->dividend());
1563 Register divisor = ToRegister(instr->divisor()); 1563 Register divisor = ToRegister(instr->divisor());
1564 Register remainder = ToRegister(instr->temp()); 1564 Register remainder = ToRegister(instr->temp());
1565 Register result = ToRegister(instr->result());
1566 ASSERT(dividend.is(eax)); 1565 ASSERT(dividend.is(eax));
1567 ASSERT(remainder.is(edx)); 1566 ASSERT(remainder.is(edx));
1568 ASSERT(result.is(eax)); 1567 ASSERT(ToRegister(instr->result()).is(eax));
1569 ASSERT(!divisor.is(eax)); 1568 ASSERT(!divisor.is(eax));
1570 ASSERT(!divisor.is(edx)); 1569 ASSERT(!divisor.is(edx));
1571 1570
1572 // Check for x / 0. 1571 // Check for x / 0.
1573 if (hdiv->CheckFlag(HValue::kCanBeDivByZero)) { 1572 if (hdiv->CheckFlag(HValue::kCanBeDivByZero)) {
1574 __ test(divisor, divisor); 1573 __ test(divisor, divisor);
1575 DeoptimizeIf(zero, instr->environment()); 1574 DeoptimizeIf(zero, instr->environment());
1576 } 1575 }
1577 1576
1578 // Check for (0 / -x) that will produce negative zero. 1577 // Check for (0 / -x) that will produce negative zero.
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6438 __ bind(deferred->exit()); 6437 __ bind(deferred->exit());
6439 __ bind(&done); 6438 __ bind(&done);
6440 } 6439 }
6441 6440
6442 6441
6443 #undef __ 6442 #undef __
6444 6443
6445 } } // namespace v8::internal 6444 } } // namespace v8::internal
6446 6445
6447 #endif // V8_TARGET_ARCH_IA32 6446 #endif // V8_TARGET_ARCH_IA32
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