| Index: src/arm/simulator-arm.cc
|
| diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
|
| index afe31db95063ec4c214049dbdb52bda4717ecbb7..ab416d724a73f1527660ad5f0982c013b8f23b7a 100644
|
| --- a/src/arm/simulator-arm.cc
|
| +++ b/src/arm/simulator-arm.cc
|
| @@ -1107,98 +1107,51 @@ void Simulator::TrashCallerSaveRegisters() {
|
| }
|
|
|
|
|
| -// Some Operating Systems allow unaligned access on ARMv7 targets. We
|
| -// assume that unaligned accesses are not allowed unless the v8 build system
|
| -// defines the CAN_USE_UNALIGNED_ACCESSES macro to be non-zero.
|
| -// The following statements below describes the behavior of the ARM CPUs
|
| -// that don't support unaligned access.
|
| -// Some ARM platforms raise an interrupt on detecting unaligned access.
|
| -// On others it does a funky rotation thing. For now we
|
| -// simply disallow unaligned reads. Note that simulator runs have the runtime
|
| -// system running directly on the host system and only generated code is
|
| -// executed in the simulator. Since the host is typically IA32 we will not
|
| -// get the correct ARM-like behaviour on unaligned accesses for those ARM
|
| -// targets that don't support unaligned loads and stores.
|
| -
|
| -
|
| int Simulator::ReadW(int32_t addr, Instruction* instr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
|
| - intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
|
| - return *ptr;
|
| - } else {
|
| - PrintF("Unaligned read at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
|
| - addr,
|
| - reinterpret_cast<intptr_t>(instr));
|
| - UNIMPLEMENTED();
|
| - return 0;
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
|
| + return *ptr;
|
| }
|
|
|
|
|
| void Simulator::WriteW(int32_t addr, int value, Instruction* instr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
|
| - intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
|
| - *ptr = value;
|
| - } else {
|
| - PrintF("Unaligned write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
|
| - addr,
|
| - reinterpret_cast<intptr_t>(instr));
|
| - UNIMPLEMENTED();
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
|
| + *ptr = value;
|
| }
|
|
|
|
|
| uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
|
| - uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
|
| - return *ptr;
|
| - } else {
|
| - PrintF("Unaligned unsigned halfword read at 0x%08x, pc=0x%08"
|
| - V8PRIxPTR "\n",
|
| - addr,
|
| - reinterpret_cast<intptr_t>(instr));
|
| - UNIMPLEMENTED();
|
| - return 0;
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
|
| + return *ptr;
|
| }
|
|
|
|
|
| int16_t Simulator::ReadH(int32_t addr, Instruction* instr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
|
| - int16_t* ptr = reinterpret_cast<int16_t*>(addr);
|
| - return *ptr;
|
| - } else {
|
| - PrintF("Unaligned signed halfword read at 0x%08x\n", addr);
|
| - UNIMPLEMENTED();
|
| - return 0;
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + int16_t* ptr = reinterpret_cast<int16_t*>(addr);
|
| + return *ptr;
|
| }
|
|
|
|
|
| void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
|
| - uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
|
| - *ptr = value;
|
| - } else {
|
| - PrintF("Unaligned unsigned halfword write at 0x%08x, pc=0x%08"
|
| - V8PRIxPTR "\n",
|
| - addr,
|
| - reinterpret_cast<intptr_t>(instr));
|
| - UNIMPLEMENTED();
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
|
| + *ptr = value;
|
| }
|
|
|
|
|
| void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 1) == 0) {
|
| - int16_t* ptr = reinterpret_cast<int16_t*>(addr);
|
| - *ptr = value;
|
| - } else {
|
| - PrintF("Unaligned halfword write at 0x%08x, pc=0x%08" V8PRIxPTR "\n",
|
| - addr,
|
| - reinterpret_cast<intptr_t>(instr));
|
| - UNIMPLEMENTED();
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + int16_t* ptr = reinterpret_cast<int16_t*>(addr);
|
| + *ptr = value;
|
| }
|
|
|
|
|
| @@ -1227,26 +1180,19 @@ void Simulator::WriteB(int32_t addr, int8_t value) {
|
|
|
|
|
| int32_t* Simulator::ReadDW(int32_t addr) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
|
| - int32_t* ptr = reinterpret_cast<int32_t*>(addr);
|
| - return ptr;
|
| - } else {
|
| - PrintF("Unaligned read at 0x%08x\n", addr);
|
| - UNIMPLEMENTED();
|
| - return 0;
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + int32_t* ptr = reinterpret_cast<int32_t*>(addr);
|
| + return ptr;
|
| }
|
|
|
|
|
| void Simulator::WriteDW(int32_t addr, int32_t value1, int32_t value2) {
|
| - if (FLAG_enable_unaligned_accesses || (addr & 3) == 0) {
|
| - int32_t* ptr = reinterpret_cast<int32_t*>(addr);
|
| - *ptr++ = value1;
|
| - *ptr = value2;
|
| - } else {
|
| - PrintF("Unaligned write at 0x%08x\n", addr);
|
| - UNIMPLEMENTED();
|
| - }
|
| + // All supported ARM targets allow unaligned accesses, so we don't need to
|
| + // check the alignment here.
|
| + int32_t* ptr = reinterpret_cast<int32_t*>(addr);
|
| + *ptr++ = value1;
|
| + *ptr = value2;
|
| }
|
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|