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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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65 #endif // CAN_USE_ARMV7_INSTRUCTIONS | 65 #endif // CAN_USE_ARMV7_INSTRUCTIONS |
66 #ifdef CAN_USE_VFP3_INSTRUCTIONS | 66 #ifdef CAN_USE_VFP3_INSTRUCTIONS |
67 if (FLAG_enable_vfp3) answer |= 1u << VFP3 | 1u << ARMv7; | 67 if (FLAG_enable_vfp3) answer |= 1u << VFP3 | 1u << ARMv7; |
68 #endif // CAN_USE_VFP3_INSTRUCTIONS | 68 #endif // CAN_USE_VFP3_INSTRUCTIONS |
69 #ifdef CAN_USE_VFP32DREGS | 69 #ifdef CAN_USE_VFP32DREGS |
70 if (FLAG_enable_32dregs) answer |= 1u << VFP32DREGS; | 70 if (FLAG_enable_32dregs) answer |= 1u << VFP32DREGS; |
71 #endif // CAN_USE_VFP32DREGS | 71 #endif // CAN_USE_VFP32DREGS |
72 #ifdef CAN_USE_NEON | 72 #ifdef CAN_USE_NEON |
73 if (FLAG_enable_neon) answer |= 1u << NEON; | 73 if (FLAG_enable_neon) answer |= 1u << NEON; |
74 #endif // CAN_USE_VFP32DREGS | 74 #endif // CAN_USE_VFP32DREGS |
75 if ((answer & (1u << ARMv7)) && FLAG_enable_unaligned_accesses) { | |
76 answer |= 1u << UNALIGNED_ACCESSES; | |
77 } | |
78 | 75 |
79 return answer; | 76 return answer; |
80 } | 77 } |
81 | 78 |
82 | 79 |
83 void CpuFeatures::ProbeImpl(bool cross_compile) { | 80 void CpuFeatures::ProbeImpl(bool cross_compile) { |
84 supported_ |= CpuFeaturesImpliedByCompiler(); | 81 supported_ |= CpuFeaturesImpliedByCompiler(); |
85 dcache_line_size_ = 64; | 82 dcache_line_size_ = 64; |
86 | 83 |
87 // Only use statically determined features for cross compile (snapshot). | 84 // Only use statically determined features for cross compile (snapshot). |
88 if (cross_compile) return; | 85 if (cross_compile) return; |
89 | 86 |
90 #ifndef __arm__ | 87 #ifndef __arm__ |
91 // For the simulator build, use whatever the flags specify. | 88 // For the simulator build, use whatever the flags specify. |
92 if (FLAG_enable_armv8) { | 89 if (FLAG_enable_armv8) { |
93 supported_ |= 1u << ARMv8; | 90 supported_ |= 1u << ARMv8; |
94 // ARMv8 always features VFP and NEON. | 91 // ARMv8 always features VFP and NEON. |
95 supported_ |= 1u << ARMv7 | 1u << VFP3 | 1u << NEON | 1u << VFP32DREGS; | 92 supported_ |= 1u << ARMv7 | 1u << VFP3 | 1u << NEON | 1u << VFP32DREGS; |
96 supported_ |= 1u << SUDIV; | 93 supported_ |= 1u << SUDIV; |
97 if (FLAG_enable_movw_movt) supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS; | 94 if (FLAG_enable_movw_movt) supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS; |
98 } | 95 } |
99 if (FLAG_enable_armv7) { | 96 if (FLAG_enable_armv7) { |
100 supported_ |= 1u << ARMv7; | 97 supported_ |= 1u << ARMv7; |
101 if (FLAG_enable_vfp3) supported_ |= 1u << VFP3; | 98 if (FLAG_enable_vfp3) supported_ |= 1u << VFP3; |
102 if (FLAG_enable_neon) supported_ |= 1u << NEON | 1u << VFP32DREGS; | 99 if (FLAG_enable_neon) supported_ |= 1u << NEON | 1u << VFP32DREGS; |
103 if (FLAG_enable_sudiv) supported_ |= 1u << SUDIV; | 100 if (FLAG_enable_sudiv) supported_ |= 1u << SUDIV; |
104 if (FLAG_enable_movw_movt) supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS; | 101 if (FLAG_enable_movw_movt) supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS; |
105 if (FLAG_enable_32dregs) supported_ |= 1u << VFP32DREGS; | 102 if (FLAG_enable_32dregs) supported_ |= 1u << VFP32DREGS; |
106 } | 103 } |
107 if (FLAG_enable_unaligned_accesses) supported_ |= 1u << UNALIGNED_ACCESSES; | |
108 | 104 |
109 #else // __arm__ | 105 #else // __arm__ |
110 // Probe for additional features at runtime. | 106 // Probe for additional features at runtime. |
111 base::CPU cpu; | 107 base::CPU cpu; |
112 if (FLAG_enable_vfp3 && cpu.has_vfp3()) { | 108 if (FLAG_enable_vfp3 && cpu.has_vfp3()) { |
113 // This implementation also sets the VFP flags if runtime | 109 // This implementation also sets the VFP flags if runtime |
114 // detection of VFP returns true. VFPv3 implies ARMv7, see ARM DDI | 110 // detection of VFP returns true. VFPv3 implies ARMv7, see ARM DDI |
115 // 0406B, page A1-6. | 111 // 0406B, page A1-6. |
116 supported_ |= 1u << VFP3 | 1u << ARMv7; | 112 supported_ |= 1u << VFP3 | 1u << ARMv7; |
117 } | 113 } |
118 | 114 |
119 if (FLAG_enable_neon && cpu.has_neon()) supported_ |= 1u << NEON; | 115 if (FLAG_enable_neon && cpu.has_neon()) supported_ |= 1u << NEON; |
120 if (FLAG_enable_sudiv && cpu.has_idiva()) supported_ |= 1u << SUDIV; | 116 if (FLAG_enable_sudiv && cpu.has_idiva()) supported_ |= 1u << SUDIV; |
121 | 117 |
122 if (cpu.architecture() >= 7) { | 118 if (cpu.architecture() >= 7) { |
123 if (FLAG_enable_armv7) supported_ |= 1u << ARMv7; | 119 if (FLAG_enable_armv7) supported_ |= 1u << ARMv7; |
124 if (FLAG_enable_armv8 && cpu.architecture() >= 8) { | 120 if (FLAG_enable_armv8 && cpu.architecture() >= 8) { |
125 supported_ |= 1u << ARMv8; | 121 supported_ |= 1u << ARMv8; |
126 } | 122 } |
127 if (FLAG_enable_unaligned_accesses) supported_ |= 1u << UNALIGNED_ACCESSES; | |
128 // Use movw/movt for QUALCOMM ARMv7 cores. | 123 // Use movw/movt for QUALCOMM ARMv7 cores. |
129 if (FLAG_enable_movw_movt && cpu.implementer() == base::CPU::QUALCOMM) { | 124 if (FLAG_enable_movw_movt && cpu.implementer() == base::CPU::QUALCOMM) { |
130 supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS; | 125 supported_ |= 1u << MOVW_MOVT_IMMEDIATE_LOADS; |
131 } | 126 } |
132 } | 127 } |
133 | 128 |
134 // ARM Cortex-A9 and Cortex-A5 have 32 byte cachelines. | 129 // ARM Cortex-A9 and Cortex-A5 have 32 byte cachelines. |
135 if (cpu.implementer() == base::CPU::ARM && | 130 if (cpu.implementer() == base::CPU::ARM && |
136 (cpu.part() == base::CPU::ARM_CORTEX_A5 || | 131 (cpu.part() == base::CPU::ARM_CORTEX_A5 || |
137 cpu.part() == base::CPU::ARM_CORTEX_A9)) { | 132 cpu.part() == base::CPU::ARM_CORTEX_A9)) { |
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195 | 190 |
196 printf("target%s%s %s%s%s %s\n", | 191 printf("target%s%s %s%s%s %s\n", |
197 arm_target_type, arm_no_probe, arm_arch, arm_fpu, arm_thumb, | 192 arm_target_type, arm_no_probe, arm_arch, arm_fpu, arm_thumb, |
198 arm_float_abi); | 193 arm_float_abi); |
199 } | 194 } |
200 | 195 |
201 | 196 |
202 void CpuFeatures::PrintFeatures() { | 197 void CpuFeatures::PrintFeatures() { |
203 printf( | 198 printf( |
204 "ARMv8=%d ARMv7=%d VFP3=%d VFP32DREGS=%d NEON=%d SUDIV=%d " | 199 "ARMv8=%d ARMv7=%d VFP3=%d VFP32DREGS=%d NEON=%d SUDIV=%d " |
205 "UNALIGNED_ACCESSES=%d MOVW_MOVT_IMMEDIATE_LOADS=%d", | 200 "MOVW_MOVT_IMMEDIATE_LOADS=%d", |
206 CpuFeatures::IsSupported(ARMv8), CpuFeatures::IsSupported(ARMv7), | 201 CpuFeatures::IsSupported(ARMv8), CpuFeatures::IsSupported(ARMv7), |
207 CpuFeatures::IsSupported(VFP3), CpuFeatures::IsSupported(VFP32DREGS), | 202 CpuFeatures::IsSupported(VFP3), CpuFeatures::IsSupported(VFP32DREGS), |
208 CpuFeatures::IsSupported(NEON), CpuFeatures::IsSupported(SUDIV), | 203 CpuFeatures::IsSupported(NEON), CpuFeatures::IsSupported(SUDIV), |
209 CpuFeatures::IsSupported(UNALIGNED_ACCESSES), | |
210 CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS)); | 204 CpuFeatures::IsSupported(MOVW_MOVT_IMMEDIATE_LOADS)); |
211 #ifdef __arm__ | 205 #ifdef __arm__ |
212 bool eabi_hardfloat = base::OS::ArmUsingHardFloat(); | 206 bool eabi_hardfloat = base::OS::ArmUsingHardFloat(); |
213 #elif USE_EABI_HARDFLOAT | 207 #elif USE_EABI_HARDFLOAT |
214 bool eabi_hardfloat = true; | 208 bool eabi_hardfloat = true; |
215 #else | 209 #else |
216 bool eabi_hardfloat = false; | 210 bool eabi_hardfloat = false; |
217 #endif | 211 #endif |
218 printf(" USE_EABI_HARDFLOAT=%d\n", eabi_hardfloat); | 212 printf(" USE_EABI_HARDFLOAT=%d\n", eabi_hardfloat); |
219 } | 213 } |
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4251 DCHECK(is_uint12(offset)); | 4245 DCHECK(is_uint12(offset)); |
4252 instr_at_put(pc, SetLdrRegisterImmediateOffset(instr, offset)); | 4246 instr_at_put(pc, SetLdrRegisterImmediateOffset(instr, offset)); |
4253 } | 4247 } |
4254 } | 4248 } |
4255 | 4249 |
4256 | 4250 |
4257 } // namespace internal | 4251 } // namespace internal |
4258 } // namespace v8 | 4252 } // namespace v8 |
4259 | 4253 |
4260 #endif // V8_TARGET_ARCH_ARM | 4254 #endif // V8_TARGET_ARCH_ARM |
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