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Unified Diff: src/core/SkHalf.h

Issue 2184753002: Add Sk4h_load4 for loading F16. (Closed) Base URL: https://skia.googlesource.com/skia.git@master
Patch Set: typo Created 4 years, 5 months ago
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Index: src/core/SkHalf.h
diff --git a/src/core/SkHalf.h b/src/core/SkHalf.h
index adf8d3a126bfc652f02205434a5d2fee0f34db63..bc9dd7940f2a9dda35e1d852c01d940c33b7ef49 100644
--- a/src/core/SkHalf.h
+++ b/src/core/SkHalf.h
@@ -37,19 +37,18 @@ static inline Sk4h SkFloatToHalf_finite(const Sk4f&);
// GCC 4.9 lacks the intrinsics to use ARMv8 f16<->f32 instructions, so we use inline assembly.
-static inline Sk4f SkHalfToFloat_finite(uint64_t hs) {
+static inline Sk4f SkHalfToFloat_finite(const Sk4h& hs) {
#if !defined(SKNX_NO_SIMD) && defined(SK_CPU_ARM64)
float32x4_t fs;
- asm ("fmov %d[fs], %[hs] \n" // vcreate_f16(hs)
- "fcvtl %[fs].4s, %[fs].4h \n" // vcvt_f32_f16(...)
+ asm ("fcvtl %[fs].4s, %[hs].4h \n" // vcvt_f32_f16(...)
: [fs] "=w" (fs) // =w: write-only NEON register
- : [hs] "r" (hs)); // r: read-only 64-bit general register
+ : [hs] "w" (hs.fVec)); // w: read-only NEON register
return fs;
#else
- Sk4i bits = SkNx_cast<int>(Sk4h::Load(&hs)), // Expand to 32 bit.
- sign = bits & 0x00008000, // Save the sign bit for later...
- positive = bits ^ sign, // ...but strip it off for now.
- is_denorm = positive < (1<<10); // Exponent == 0?
+ Sk4i bits = SkNx_cast<int>(hs), // Expand to 32 bit.
+ sign = bits & 0x00008000, // Save the sign bit for later...
+ positive = bits ^ sign, // ...but strip it off for now.
+ is_denorm = positive < (1<<10); // Exponent == 0?
// For normal half floats, extend the mantissa by 13 zero bits,
// then adjust the exponent from 15 bias to 127 bias.
@@ -66,6 +65,10 @@ static inline Sk4f SkHalfToFloat_finite(uint64_t hs) {
#endif
}
+static inline Sk4f SkHalfToFloat_finite(uint64_t hs) {
+ return SkHalfToFloat_finite(Sk4h::Load(&hs));
+}
+
static inline Sk4h SkFloatToHalf_finite(const Sk4f& fs) {
#if !defined(SKNX_NO_SIMD) && defined(SK_CPU_ARM64)
float32x4_t vec = fs.fVec;
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