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1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_DBC_H_ | 5 #ifndef VM_CONSTANTS_DBC_H_ |
6 #define VM_CONSTANTS_DBC_H_ | 6 #define VM_CONSTANTS_DBC_H_ |
7 | 7 |
8 #include "platform/globals.h" | 8 #include "platform/globals.h" |
9 #include "platform/assert.h" | 9 #include "platform/assert.h" |
10 #include "platform/utils.h" | 10 #include "platform/utils.h" |
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186 // If these instructions can trigger a deoptimization, the following | 186 // If these instructions can trigger a deoptimization, the following |
187 // instruction should be Deopt. If no deoptimization should be triggered, | 187 // instruction should be Deopt. If no deoptimization should be triggered, |
188 // the immediately following instruction is skipped. These instructions | 188 // the immediately following instruction is skipped. These instructions |
189 // expect their operands to be Smis, but don't check that they are. | 189 // expect their operands to be Smis, but don't check that they are. |
190 // | 190 // |
191 // - Min, Max rA, rB, rC | 191 // - Min, Max rA, rB, rC |
192 // | 192 // |
193 // FP[rA] <- {min, max}(FP[rB], FP[rC]). Assumes that FP[rB], and FP[rC] are | 193 // FP[rA] <- {min, max}(FP[rB], FP[rC]). Assumes that FP[rB], and FP[rC] are |
194 // Smis. | 194 // Smis. |
195 // | 195 // |
196 // - DAdd, DSub, DMul, DDiv rA, rB, rC | |
197 // | |
198 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. | |
199 // | |
200 // - Neg rA , rD | 196 // - Neg rA , rD |
201 // | 197 // |
202 // FP[rA] <- -FP[rD]. Assumes FP[rD] is a Smi. If there is no overflow the | 198 // FP[rA] <- -FP[rD]. Assumes FP[rD] is a Smi. If there is no overflow the |
203 // immediately following instruction is skipped. | 199 // immediately following instruction is skipped. |
204 // | 200 // |
205 // - DNeg rA, rD | 201 // - DMin, DMax, DAdd, DSub, DMul, DDiv, DPow, DMod rA, rB, rC |
206 // | 202 // |
207 // FP[rA] <- -FP[rD]. Assumes FP[rD] is an unboxed double. | 203 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. |
208 // | 204 // |
209 // - DSqrt rA, rD | 205 // - DNeg, DCos, DSin, DSqrt rA, rD |
210 // | 206 // |
211 // FP[rA] <- sqrt(FP[rD]). Assumes FP[rD] is an unboxed double. | 207 // FP[rA] <- op(FP[rD]). Assumes FP[rD] is an unboxed double. |
212 // | |
213 // - DMin, DMax rA, rB, rC | |
214 // | |
215 // FP[rA] <- {min, max}(FP[rB], FP[rC]). Assumes FP[rB] and FP[rC] are | |
216 // unboxed doubles. | |
217 // | 208 // |
218 // - BitOr, BitAnd, BitXor rA, rB, rC | 209 // - BitOr, BitAnd, BitXor rA, rB, rC |
219 // | 210 // |
220 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be | 211 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be |
221 // Smis, but don't check that they are. | 212 // Smis, but don't check that they are. |
222 // | 213 // |
223 // - BitNot rA, rD | 214 // - BitNot rA, rD |
224 // | 215 // |
225 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. | 216 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. |
226 // | 217 // |
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298 // | 289 // |
299 // Allocate object of class SP[0] with type arguments SP[-1]. | 290 // Allocate object of class SP[0] with type arguments SP[-1]. |
300 // | 291 // |
301 // - StoreIndexedTOS | 292 // - StoreIndexedTOS |
302 // | 293 // |
303 // Store SP[0] into array SP[-2] at index SP[-1]. No typechecking is done. | 294 // Store SP[0] into array SP[-2] at index SP[-1]. No typechecking is done. |
304 // SP[-2] is assumed to be a RawArray, SP[-1] to be a smi. | 295 // SP[-2] is assumed to be a RawArray, SP[-1] to be a smi. |
305 // | 296 // |
306 // - StoreIndexed rA, rB, rC | 297 // - StoreIndexed rA, rB, rC |
307 // | 298 // |
308 // Store rC into array rA at index rB. No typechecking is done. | 299 // Store FP[rC] into array FP[rA] at index FP[rB]. No typechecking is done. |
309 // rA is assumed to be a RawArray, rB to be a smi. | 300 // FP[rA] is assumed to be a RawArray, FP[rB] to be a smi. |
| 301 // |
| 302 // - StoreFloat64Indexed rA, rB, rC |
| 303 // |
| 304 // Store the unboxed double in FP[rC] into the typed data array at FP[rA] |
| 305 // at index FP[rB]. |
310 // | 306 // |
311 // - LoadIndexed rA, rB, rC | 307 // - LoadIndexed rA, rB, rC |
312 // | 308 // |
313 // Loads from array FP[rB] at index FP[rC] into FP[rA]. No typechecking is | 309 // Loads from array FP[rB] at index FP[rC] into FP[rA]. No typechecking is |
314 // done. FP[rB] is assumed to be a RawArray, and to contain a Smi at FP[rC]. | 310 // done. FP[rB] is assumed to be a RawArray, and to contain a Smi at FP[rC]. |
315 // | 311 // |
| 312 // - Load{Float64, OneByteString, TwoByteString}Indexed rA, rB, rC |
| 313 // |
| 314 // Loads from typed data array FP[rB] at index FP[rC] into an unboxed double, |
| 315 // or tagged Smi in FP[rA] as indicated by the type in the name. |
| 316 // |
316 // - StoreField rA, B, rC | 317 // - StoreField rA, B, rC |
317 // | 318 // |
318 // Store value FP[rC] into object FP[rA] at offset (in words) B. | 319 // Store value FP[rC] into object FP[rA] at offset (in words) B. |
319 // | 320 // |
320 // - StoreFieldTOS D | 321 // - StoreFieldTOS D |
321 // | 322 // |
322 // Store value SP[0] into object SP[-1] at offset (in words) D. | 323 // Store value SP[0] into object SP[-1] at offset (in words) D. |
323 // | 324 // |
324 // - LoadField rA, rB, C | 325 // - LoadField rA, rB, C |
325 // | 326 // |
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591 V(SmiToDouble, A_D, reg, reg, ___) \ | 592 V(SmiToDouble, A_D, reg, reg, ___) \ |
592 V(DoubleToSmi, A_D, reg, reg, ___) \ | 593 V(DoubleToSmi, A_D, reg, reg, ___) \ |
593 V(DAdd, A_B_C, reg, reg, reg) \ | 594 V(DAdd, A_B_C, reg, reg, reg) \ |
594 V(DSub, A_B_C, reg, reg, reg) \ | 595 V(DSub, A_B_C, reg, reg, reg) \ |
595 V(DMul, A_B_C, reg, reg, reg) \ | 596 V(DMul, A_B_C, reg, reg, reg) \ |
596 V(DDiv, A_B_C, reg, reg, reg) \ | 597 V(DDiv, A_B_C, reg, reg, reg) \ |
597 V(DNeg, A_D, reg, reg, ___) \ | 598 V(DNeg, A_D, reg, reg, ___) \ |
598 V(DSqrt, A_D, reg, reg, ___) \ | 599 V(DSqrt, A_D, reg, reg, ___) \ |
599 V(DMin, A_B_C, reg, reg, reg) \ | 600 V(DMin, A_B_C, reg, reg, reg) \ |
600 V(DMax, A_B_C, reg, reg, reg) \ | 601 V(DMax, A_B_C, reg, reg, reg) \ |
| 602 V(DCos, A_D, reg, reg, ___) \ |
| 603 V(DSin, A_D, reg, reg, ___) \ |
| 604 V(DPow, A_B_C, reg, reg, reg) \ |
| 605 V(DMod, A_B_C, reg, reg, reg) \ |
601 V(StoreStaticTOS, D, lit, ___, ___) \ | 606 V(StoreStaticTOS, D, lit, ___, ___) \ |
602 V(PushStatic, D, lit, ___, ___) \ | 607 V(PushStatic, D, lit, ___, ___) \ |
603 V(InitStaticTOS, 0, ___, ___, ___) \ | 608 V(InitStaticTOS, 0, ___, ___, ___) \ |
604 V(IfNeStrictTOS, 0, ___, ___, ___) \ | 609 V(IfNeStrictTOS, 0, ___, ___, ___) \ |
605 V(IfEqStrictTOS, 0, ___, ___, ___) \ | 610 V(IfEqStrictTOS, 0, ___, ___, ___) \ |
606 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ | 611 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ |
607 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ | 612 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ |
608 V(IfNeStrict, A_D, reg, reg, ___) \ | 613 V(IfNeStrict, A_D, reg, reg, ___) \ |
609 V(IfEqStrict, A_D, reg, reg, ___) \ | 614 V(IfEqStrict, A_D, reg, reg, ___) \ |
610 V(IfLe, A_D, reg, reg, ___) \ | 615 V(IfLe, A_D, reg, reg, ___) \ |
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623 V(IfDGt, A_D, reg, reg, ___) \ | 628 V(IfDGt, A_D, reg, reg, ___) \ |
624 V(IfNeStrictNum, A_D, reg, reg, ___) \ | 629 V(IfNeStrictNum, A_D, reg, reg, ___) \ |
625 V(IfEqStrictNum, A_D, reg, reg, ___) \ | 630 V(IfEqStrictNum, A_D, reg, reg, ___) \ |
626 V(IfEqNull, A, reg, ___, ___) \ | 631 V(IfEqNull, A, reg, ___, ___) \ |
627 V(IfNeNull, A, reg, ___, ___) \ | 632 V(IfNeNull, A, reg, ___, ___) \ |
628 V(CreateArrayTOS, 0, ___, ___, ___) \ | 633 V(CreateArrayTOS, 0, ___, ___, ___) \ |
629 V(Allocate, D, lit, ___, ___) \ | 634 V(Allocate, D, lit, ___, ___) \ |
630 V(AllocateT, 0, ___, ___, ___) \ | 635 V(AllocateT, 0, ___, ___, ___) \ |
631 V(StoreIndexedTOS, 0, ___, ___, ___) \ | 636 V(StoreIndexedTOS, 0, ___, ___, ___) \ |
632 V(StoreIndexed, A_B_C, reg, reg, reg) \ | 637 V(StoreIndexed, A_B_C, reg, reg, reg) \ |
| 638 V(StoreFloat64Indexed, A_B_C, reg, reg, reg) \ |
633 V(LoadIndexed, A_B_C, reg, reg, reg) \ | 639 V(LoadIndexed, A_B_C, reg, reg, reg) \ |
| 640 V(LoadFloat64Indexed, A_B_C, reg, reg, reg) \ |
| 641 V(LoadOneByteStringIndexed, A_B_C, reg, reg, reg) \ |
| 642 V(LoadTwoByteStringIndexed, A_B_C, reg, reg, reg) \ |
634 V(StoreField, A_B_C, reg, num, reg) \ | 643 V(StoreField, A_B_C, reg, num, reg) \ |
635 V(StoreFieldTOS, D, num, ___, ___) \ | 644 V(StoreFieldTOS, D, num, ___, ___) \ |
636 V(LoadField, A_B_C, reg, reg, num) \ | 645 V(LoadField, A_B_C, reg, reg, num) \ |
637 V(LoadFieldTOS, D, num, ___, ___) \ | 646 V(LoadFieldTOS, D, num, ___, ___) \ |
638 V(BooleanNegateTOS, 0, ___, ___, ___) \ | 647 V(BooleanNegateTOS, 0, ___, ___, ___) \ |
639 V(BooleanNegate, A_D, reg, reg, ___) \ | 648 V(BooleanNegate, A_D, reg, reg, ___) \ |
640 V(Throw, A, num, ___, ___) \ | 649 V(Throw, A, num, ___, ___) \ |
641 V(Entry, A_B_C, num, num, num) \ | 650 V(Entry, A_B_C, num, num, num) \ |
642 V(EntryOptional, A_B_C, num, num, num) \ | 651 V(EntryOptional, A_B_C, num, num, num) \ |
643 V(EntryOptimized, A_D, num, num, ___) \ | 652 V(EntryOptimized, A_D, num, num, ___) \ |
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778 | 787 |
779 // After a comparison, the condition NEXT_IS_TRUE means the following | 788 // After a comparison, the condition NEXT_IS_TRUE means the following |
780 // instruction is executed if the comparision is true and skipped over overwise. | 789 // instruction is executed if the comparision is true and skipped over overwise. |
781 // Conidition NEXT_IS_FALSE means the following instruction is executed if the | 790 // Conidition NEXT_IS_FALSE means the following instruction is executed if the |
782 // comparison is false and skipped over otherwise. | 791 // comparison is false and skipped over otherwise. |
783 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; | 792 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; |
784 | 793 |
785 } // namespace dart | 794 } // namespace dart |
786 | 795 |
787 #endif // VM_CONSTANTS_DBC_H_ | 796 #endif // VM_CONSTANTS_DBC_H_ |
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