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Side by Side Diff: src/IceTargetLoweringX86BaseImpl.h

Issue 2177033002: Subzero: Local variable splitting. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Cleanup Created 4 years, 5 months ago
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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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514 BoolFlagSaver B(RandomizationPoolingPaused, true); 514 BoolFlagSaver B(RandomizationPoolingPaused, true);
515 doLoadOpt(); 515 doLoadOpt();
516 } 516 }
517 Func->genCode(); 517 Func->genCode();
518 if (Func->hasError()) 518 if (Func->hasError())
519 return; 519 return;
520 if (SandboxingType != ST_None) { 520 if (SandboxingType != ST_None) {
521 initSandbox(); 521 initSandbox();
522 } 522 }
523 Func->dump("After x86 codegen"); 523 Func->dump("After x86 codegen");
524 Func->splitLocalVars();
524 525
525 // Register allocation. This requires instruction renumbering and full 526 // Register allocation. This requires instruction renumbering and full
526 // liveness analysis. Loops must be identified before liveness so variable 527 // liveness analysis. Loops must be identified before liveness so variable
527 // use weights are correct. 528 // use weights are correct.
528 Func->renumberInstructions(); 529 Func->renumberInstructions();
529 if (Func->hasError()) 530 if (Func->hasError())
530 return; 531 return;
531 Func->liveness(Liveness_Intervals); 532 Func->liveness(Liveness_Intervals);
532 if (Func->hasError()) 533 if (Func->hasError())
533 return; 534 return;
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1035 SpillAreaSizeBytes = 0; 1036 SpillAreaSizeBytes = 0;
1036 // If there is a separate locals area, this specifies the alignment for it. 1037 // If there is a separate locals area, this specifies the alignment for it.
1037 uint32_t LocalsSlotsAlignmentBytes = 0; 1038 uint32_t LocalsSlotsAlignmentBytes = 0;
1038 // The entire spill locations area gets aligned to largest natural alignment 1039 // The entire spill locations area gets aligned to largest natural alignment
1039 // of the variables that have a spill slot. 1040 // of the variables that have a spill slot.
1040 uint32_t SpillAreaAlignmentBytes = 0; 1041 uint32_t SpillAreaAlignmentBytes = 0;
1041 // A spill slot linked to a variable with a stack slot should reuse that 1042 // A spill slot linked to a variable with a stack slot should reuse that
1042 // stack slot. 1043 // stack slot.
1043 std::function<bool(Variable *)> TargetVarHook = 1044 std::function<bool(Variable *)> TargetVarHook =
1044 [&VariablesLinkedToSpillSlots](Variable *Var) { 1045 [&VariablesLinkedToSpillSlots](Variable *Var) {
1045 if (Var->getLinkedTo() != nullptr) { 1046 // TODO(stichnot): Refactor this into the base class.
1046 // TODO(stichnot): This assert won't necessarily be true in the 1047 Variable *Root = Var->getLinkedToStackRoot();
1047 // future. 1048 if (Root != nullptr) {
1048 assert(Var->mustNotHaveReg()); 1049 assert(!Root->hasReg());
1049 if (!Var->getLinkedTo()->hasReg()) { 1050 if (!Root->hasReg()) {
1050 VariablesLinkedToSpillSlots.push_back(Var); 1051 VariablesLinkedToSpillSlots.push_back(Var);
1051 return true; 1052 return true;
1052 } 1053 }
1053 } 1054 }
1054 return false; 1055 return false;
1055 }; 1056 };
1056 1057
1057 // Compute the list of spilled variables and bounds for GlobalsSize, etc. 1058 // Compute the list of spilled variables and bounds for GlobalsSize, etc.
1058 getVarStackSlotParams(SortedSpilledVariables, RegsUsed, &GlobalsSize, 1059 getVarStackSlotParams(SortedSpilledVariables, RegsUsed, &GlobalsSize,
1059 &SpillAreaSizeBytes, &SpillAreaAlignmentBytes, 1060 &SpillAreaSizeBytes, &SpillAreaAlignmentBytes,
(...skipping 143 matching lines...) Expand 10 before | Expand all | Expand 10 after
1203 InArgsSizeBytes); 1204 InArgsSizeBytes);
1204 } 1205 }
1205 1206
1206 // Fill in stack offsets for locals. 1207 // Fill in stack offsets for locals.
1207 assignVarStackSlots(SortedSpilledVariables, SpillAreaPaddingBytes, 1208 assignVarStackSlots(SortedSpilledVariables, SpillAreaPaddingBytes,
1208 SpillAreaSizeBytes, GlobalsAndSubsequentPaddingSize, 1209 SpillAreaSizeBytes, GlobalsAndSubsequentPaddingSize,
1209 IsEbpBasedFrame); 1210 IsEbpBasedFrame);
1210 // Assign stack offsets to variables that have been linked to spilled 1211 // Assign stack offsets to variables that have been linked to spilled
1211 // variables. 1212 // variables.
1212 for (Variable *Var : VariablesLinkedToSpillSlots) { 1213 for (Variable *Var : VariablesLinkedToSpillSlots) {
1213 const Variable *Root = Var->getLinkedToRoot(); 1214 const Variable *Root = Var->getLinkedToStackRoot();
1214 assert(Root != nullptr); 1215 assert(Root != nullptr);
1215 Var->setStackOffset(Root->getStackOffset()); 1216 Var->setStackOffset(Root->getStackOffset());
1216 } 1217 }
1217 this->HasComputedFrame = true; 1218 this->HasComputedFrame = true;
1218 1219
1219 if (BuildDefs::dump() && Func->isVerbose(IceV_Frame)) { 1220 if (BuildDefs::dump() && Func->isVerbose(IceV_Frame)) {
1220 OstreamLocker L(Func->getContext()); 1221 OstreamLocker L(Func->getContext());
1221 Ostream &Str = Func->getContext()->getStrDump(); 1222 Ostream &Str = Func->getContext()->getStrDump();
1222 1223
1223 Str << "Stack layout:\n"; 1224 Str << "Stack layout:\n";
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1343 return; 1344 return;
1344 } 1345 }
1345 emitSandboxedReturn(); 1346 emitSandboxedReturn();
1346 if (RI->getSrcSize()) { 1347 if (RI->getSrcSize()) {
1347 auto *RetValue = llvm::cast<Variable>(RI->getSrc(0)); 1348 auto *RetValue = llvm::cast<Variable>(RI->getSrc(0));
1348 Context.insert<InstFakeUse>(RetValue); 1349 Context.insert<InstFakeUse>(RetValue);
1349 } 1350 }
1350 RI->setDeleted(); 1351 RI->setDeleted();
1351 } 1352 }
1352 1353
1354 template <typename TraitsType>
1355 Inst *TargetX86Base<TraitsType>::createLoweredMove(Variable *Dest,
1356 Variable *SrcVar) {
1357 if (isVectorType(Dest->getType())) {
1358 return Traits::Insts::Movp::create(Func, Dest, SrcVar);
1359 }
1360 return Traits::Insts::Mov::create(Func, Dest, SrcVar);
1361 }
1362
1353 template <typename TraitsType> Type TargetX86Base<TraitsType>::stackSlotType() { 1363 template <typename TraitsType> Type TargetX86Base<TraitsType>::stackSlotType() {
1354 return Traits::WordType; 1364 return Traits::WordType;
1355 } 1365 }
1356 1366
1357 template <typename TraitsType> 1367 template <typename TraitsType>
1358 template <typename T> 1368 template <typename T>
1359 typename std::enable_if<!T::Is64Bit, Operand>::type * 1369 typename std::enable_if<!T::Is64Bit, Operand>::type *
1360 TargetX86Base<TraitsType>::loOperand(Operand *Operand) { 1370 TargetX86Base<TraitsType>::loOperand(Operand *Operand) {
1361 assert(Operand->getType() == IceType_i64 || 1371 assert(Operand->getType() == IceType_i64 ||
1362 Operand->getType() == IceType_f64); 1372 Operand->getType() == IceType_f64);
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3117 case IceType_f64: { 3127 case IceType_f64: {
3118 assert(Src0->getType() == IceType_i64); 3128 assert(Src0->getType() == IceType_i64);
3119 if (Traits::Is64Bit) { 3129 if (Traits::Is64Bit) {
3120 Operand *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); 3130 Operand *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem);
3121 Variable *T = makeReg(IceType_f64); 3131 Variable *T = makeReg(IceType_f64);
3122 _movd(T, Src0RM); 3132 _movd(T, Src0RM);
3123 _mov(Dest, T); 3133 _mov(Dest, T);
3124 } else { 3134 } else {
3125 Src0 = legalize(Src0); 3135 Src0 = legalize(Src0);
3126 if (llvm::isa<X86OperandMem>(Src0)) { 3136 if (llvm::isa<X86OperandMem>(Src0)) {
3127 Variable *T = Func->makeVariable(DestTy); 3137 Variable *T = makeReg(DestTy);
3128 _movq(T, Src0); 3138 _movq(T, Src0);
3129 _movq(Dest, T); 3139 _movq(Dest, T);
3130 break; 3140 break;
3131 } 3141 }
3132 // a.f64 = bitcast b.i64 ==> 3142 // a.f64 = bitcast b.i64 ==>
3133 // t_lo.i32 = b_lo.i32 3143 // t_lo.i32 = b_lo.i32
3134 // FakeDef(s.f64) 3144 // FakeDef(s.f64)
3135 // lo(s.f64) = t_lo.i32 3145 // lo(s.f64) = t_lo.i32
3136 // t_hi.i32 = b_hi.i32 3146 // t_hi.i32 = b_hi.i32
3137 // hi(s.f64) = t_hi.i32 3147 // hi(s.f64) = t_hi.i32
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8071 emitGlobal(*Var, SectionSuffix); 8081 emitGlobal(*Var, SectionSuffix);
8072 } 8082 }
8073 } 8083 }
8074 } break; 8084 } break;
8075 } 8085 }
8076 } 8086 }
8077 } // end of namespace X86NAMESPACE 8087 } // end of namespace X86NAMESPACE
8078 } // end of namespace Ice 8088 } // end of namespace Ice
8079 8089
8080 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H 8090 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H
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