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1 ; This tests each of the supported NaCl atomic instructions for every | 1 ; This tests each of the supported NaCl atomic instructions for every |
2 ; size allowed. | 2 ; size allowed. |
3 | 3 |
4 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ | 4 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ |
5 ; RUN: -allow-externally-defined-symbols | FileCheck %s | 5 ; RUN: -allow-externally-defined-symbols | FileCheck %s |
6 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ | 6 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -O2 \ |
7 ; RUN: -allow-externally-defined-symbols | FileCheck --check-prefix=O2 %s | 7 ; RUN: -allow-externally-defined-symbols | FileCheck --check-prefix=O2 %s |
8 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \ | 8 ; RUN: %p2i -i %s --filetype=obj --disassemble --args -Om1 \ |
9 ; RUN: -allow-externally-defined-symbols | FileCheck %s | 9 ; RUN: -allow-externally-defined-symbols | FileCheck %s |
10 | 10 |
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1395 %i_plus_1 = add i32 %i, 1 | 1395 %i_plus_1 = add i32 %i, 1 |
1396 %cmp = icmp eq i32 %i_plus_1, 1001 | 1396 %cmp = icmp eq i32 %i_plus_1, 1001 |
1397 br i1 %cmp, label %done, label %body | 1397 br i1 %cmp, label %done, label %body |
1398 done: | 1398 done: |
1399 ret void | 1399 ret void |
1400 } | 1400 } |
1401 ; O2-LABEL: test_xadd_regalloc | 1401 ; O2-LABEL: test_xadd_regalloc |
1402 ;;; Some register will be used in the xadd instruction. | 1402 ;;; Some register will be used in the xadd instruction. |
1403 ; O2: lock xadd DWORD PTR {{.*}},[[REG:e..]] | 1403 ; O2: lock xadd DWORD PTR {{.*}},[[REG:e..]] |
1404 ;;; Make sure that register isn't used again, e.g. as the induction variable. | 1404 ;;; Make sure that register isn't used again, e.g. as the induction variable. |
1405 ; O2-NOT: [[REG]] | 1405 ; O2-NOT: ,[[REG]] |
1406 ; O2: ret | 1406 ; O2: ret |
1407 | 1407 |
1408 ; Do the same test for the xchg instruction instead of xadd. | 1408 ; Do the same test for the xchg instruction instead of xadd. |
1409 define internal void @test_xchg_regalloc() { | 1409 define internal void @test_xchg_regalloc() { |
1410 entry: | 1410 entry: |
1411 br label %body | 1411 br label %body |
1412 body: | 1412 body: |
1413 %i = phi i32 [ 1, %entry ], [ %i_plus_1, %body ] | 1413 %i = phi i32 [ 1, %entry ], [ %i_plus_1, %body ] |
1414 %g = bitcast [4 x i8]* @SzGlobal32 to i32* | 1414 %g = bitcast [4 x i8]* @SzGlobal32 to i32* |
1415 %unused = call i32 @llvm.nacl.atomic.rmw.i32(i32 6, i32* %g, i32 %i, i32 6) | 1415 %unused = call i32 @llvm.nacl.atomic.rmw.i32(i32 6, i32* %g, i32 %i, i32 6) |
1416 %i_plus_1 = add i32 %i, 1 | 1416 %i_plus_1 = add i32 %i, 1 |
1417 %cmp = icmp eq i32 %i_plus_1, 1001 | 1417 %cmp = icmp eq i32 %i_plus_1, 1001 |
1418 br i1 %cmp, label %done, label %body | 1418 br i1 %cmp, label %done, label %body |
1419 done: | 1419 done: |
1420 ret void | 1420 ret void |
1421 } | 1421 } |
1422 ; O2-LABEL: test_xchg_regalloc | 1422 ; O2-LABEL: test_xchg_regalloc |
1423 ;;; Some register will be used in the xchg instruction. | 1423 ;;; Some register will be used in the xchg instruction. |
1424 ; O2: xchg DWORD PTR {{.*}},[[REG:e..]] | 1424 ; O2: xchg DWORD PTR {{.*}},[[REG:e..]] |
1425 ;;; Make sure that register isn't used again, e.g. as the induction variable. | 1425 ;;; Make sure that register isn't used again, e.g. as the induction variable. |
1426 ; O2-NOT: [[REG]] | 1426 ; O2-NOT: ,[[REG]] |
1427 ; O2: ret | 1427 ; O2: ret |
1428 | 1428 |
1429 ; Same test for cmpxchg. | 1429 ; Same test for cmpxchg. |
1430 define internal void @test_cmpxchg_regalloc() { | 1430 define internal void @test_cmpxchg_regalloc() { |
1431 entry: | 1431 entry: |
1432 br label %body | 1432 br label %body |
1433 body: | 1433 body: |
1434 %i = phi i32 [ 1, %entry ], [ %i_plus_1, %body ] | 1434 %i = phi i32 [ 1, %entry ], [ %i_plus_1, %body ] |
1435 %g = bitcast [4 x i8]* @SzGlobal32 to i32* | 1435 %g = bitcast [4 x i8]* @SzGlobal32 to i32* |
1436 %unused = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %g, i32 %i, i32 %i, i32
6, i32 6) | 1436 %unused = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %g, i32 %i, i32 %i, i32
6, i32 6) |
1437 %i_plus_1 = add i32 %i, 1 | 1437 %i_plus_1 = add i32 %i, 1 |
1438 %cmp = icmp eq i32 %i_plus_1, 1001 | 1438 %cmp = icmp eq i32 %i_plus_1, 1001 |
1439 br i1 %cmp, label %done, label %body | 1439 br i1 %cmp, label %done, label %body |
1440 done: | 1440 done: |
1441 ret void | 1441 ret void |
1442 } | 1442 } |
1443 ; O2-LABEL: test_cmpxchg_regalloc | 1443 ; O2-LABEL: test_cmpxchg_regalloc |
1444 ;;; eax and some other register will be used in the cmpxchg instruction. | 1444 ;;; eax and some other register will be used in the cmpxchg instruction. |
1445 ; O2: lock cmpxchg DWORD PTR {{.*}},[[REG:e..]] | 1445 ; O2: lock cmpxchg DWORD PTR {{.*}},[[REG:e..]] |
1446 ;;; Make sure eax isn't used again, e.g. as the induction variable. | 1446 ;;; Make sure eax isn't used again, e.g. as the induction variable. |
1447 ; O2-NOT: eax | 1447 ; O2-NOT: ,eax |
1448 ; O2: ret | 1448 ; O2: ret |
1449 | 1449 |
1450 ; Same test for cmpxchg8b. | 1450 ; Same test for cmpxchg8b. |
1451 define internal void @test_cmpxchg8b_regalloc() { | 1451 define internal void @test_cmpxchg8b_regalloc() { |
1452 entry: | 1452 entry: |
1453 br label %body | 1453 br label %body |
1454 body: | 1454 body: |
1455 %i = phi i32 [ 1, %entry ], [ %i_plus_1, %body ] | 1455 %i = phi i32 [ 1, %entry ], [ %i_plus_1, %body ] |
1456 %g = bitcast [8 x i8]* @SzGlobal64 to i64* | 1456 %g = bitcast [8 x i8]* @SzGlobal64 to i64* |
1457 %i_64 = zext i32 %i to i64 | 1457 %i_64 = zext i32 %i to i64 |
1458 %unused = call i64 @llvm.nacl.atomic.cmpxchg.i64(i64* %g, i64 %i_64, i64 %i_64
, i32 6, i32 6) | 1458 %unused = call i64 @llvm.nacl.atomic.cmpxchg.i64(i64* %g, i64 %i_64, i64 %i_64
, i32 6, i32 6) |
1459 %i_plus_1 = add i32 %i, 1 | 1459 %i_plus_1 = add i32 %i, 1 |
1460 %cmp = icmp eq i32 %i_plus_1, 1001 | 1460 %cmp = icmp eq i32 %i_plus_1, 1001 |
1461 br i1 %cmp, label %done, label %body | 1461 br i1 %cmp, label %done, label %body |
1462 done: | 1462 done: |
1463 ret void | 1463 ret void |
1464 } | 1464 } |
1465 ; O2-LABEL: test_cmpxchg8b_regalloc | 1465 ; O2-LABEL: test_cmpxchg8b_regalloc |
1466 ;;; eax and some other register will be used in the cmpxchg instruction. | 1466 ;;; eax and some other register will be used in the cmpxchg instruction. |
1467 ; O2: lock cmpxchg8b QWORD PTR | 1467 ; O2: lock cmpxchg8b QWORD PTR |
1468 ;;; Make sure eax/ecx/edx/ebx aren't used again, e.g. as the induction variable. | 1468 ;;; Make sure eax/ecx/edx/ebx aren't used again, e.g. as the induction variable. |
1469 ; O2-NOT: {{eax|ecx|edx|ebx}} | 1469 ; O2-NOT: ,{{eax|ecx|edx|ebx}} |
1470 ; O2: pop ebx | 1470 ; O2: pop ebx |
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