[Turbofan] Revert FP register aliasing support on Arm.

test/cctest/compiler/test-gap-resolver.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/gap-resolver.h"
 
 #include "src/base/utils/random-number-generator.h"
 #include "test/cctest/cctest.h"
 
 namespace v8 {
@@ skipping 65 matching lines @@
   static Key KeyFor(const InstructionOperand& op) {
     bool is_constant = op.IsConstant();
     MachineRepresentation rep =
         v8::internal::compiler::InstructionSequence::DefaultRepresentation();
     LocationOperand::LocationKind kind;
     int index;
     if (!is_constant) {
       const LocationOperand& loc_op = LocationOperand::cast(op);
       if (loc_op.IsAnyRegister()) {
         if (loc_op.IsFPRegister()) {
-          rep = kSimpleFPAliasing ? MachineRepresentation::kFloat64
-                                  : loc_op.representation();
+          rep = MachineRepresentation::kFloat64;
         }
         index = loc_op.register_code();
       } else {
         index = loc_op.index();
       }
       kind = loc_op.location_kind();
     } else {
       index = ConstantOperand::cast(op).virtual_register();
       kind = LocationOperand::REGISTER;
     }
@@ skipping 81 matching lines @@
 
  private:
   MachineRepresentation RandomRepresentation() {
     int index = rng_->NextInt(5);
     switch (index) {
       case 0:
         return MachineRepresentation::kWord32;
       case 1:
         return MachineRepresentation::kWord64;
       case 2:
-        // TODO(bbudge) Re-enable float operands when GapResolver correctly
-        // handles FP aliasing.
-        return kSimpleFPAliasing ? MachineRepresentation::kFloat32
-                                 : MachineRepresentation::kFloat64;
+        return MachineRepresentation::kFloat32;
       case 3:
         return MachineRepresentation::kFloat64;
       case 4:
         return MachineRepresentation::kTagged;
     }
     UNREACHABLE();
     return MachineRepresentation::kNone;
   }
 
   InstructionOperand CreateRandomOperand(bool is_source,
                                          MachineRepresentation rep) {
     auto conf = RegisterConfiguration::Turbofan();
     auto GetRegisterCode = [&conf](MachineRepresentation rep, int index) {
       switch (rep) {
         case MachineRepresentation::kFloat32:
+#if V8_TARGET_ARCH_ARM
+          // Only even number float registers are used on Arm.
+          // TODO(bbudge) Eliminate this when FP register aliasing works.
+          return conf->RegisterConfiguration::GetAllocatableDoubleCode(index) *
+                 2;
+#endif
+        // Fall through on non-Arm targets.
         case MachineRepresentation::kFloat64:
           return conf->RegisterConfiguration::GetAllocatableDoubleCode(index);
-          break;
 
         default:
           return conf->RegisterConfiguration::GetAllocatableGeneralCode(index);
-          break;
       }
       UNREACHABLE();
       return static_cast<int>(Register::kCode_no_reg);
     };
     int index = rng_->NextInt(7);
     // destination can't be Constant.
     switch (rng_->NextInt(is_source ? 5 : 4)) {
       case 0:
         return AllocatedOperand(LocationOperand::STACK_SLOT, rep, index);
       case 1:
@@ skipping 31 matching lines @@
       resolver.Resolve(pm);
 
       CHECK_EQ(mi1.state(), mi2.state());
     }
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8