[Turbofan] Revert FP register aliasing support on Arm.

src/compiler/register-allocator.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/register-allocator.h"
 #include "src/string-stream.h"
 
 namespace v8 {
@@ skipping 15 matching lines @@
 }
 
 int GetRegisterCount(const RegisterConfiguration* cfg, RegisterKind kind) {
   return kind == FP_REGISTERS ? cfg->num_double_registers()
                               : cfg->num_general_registers();
 }
 
 
 int GetAllocatableRegisterCount(const RegisterConfiguration* cfg,
                                 RegisterKind kind) {
-  return kind == FP_REGISTERS ? cfg->num_allocatable_double_registers()
+  return kind == FP_REGISTERS ? cfg->num_allocatable_aliased_double_registers()
                               : cfg->num_allocatable_general_registers();
 }
 
 
 const int* GetAllocatableRegisterCodes(const RegisterConfiguration* cfg,
                                        RegisterKind kind) {
   return kind == FP_REGISTERS ? cfg->allocatable_double_codes()
                               : cfg->allocatable_general_codes();
 }
 
@@ skipping 18 matching lines @@
 }
 
 // TODO(dcarney): fix frame to allow frame accesses to half size location.
 int GetByteWidth(MachineRepresentation rep) {
   switch (rep) {
     case MachineRepresentation::kBit:
     case MachineRepresentation::kWord8:
     case MachineRepresentation::kWord16:
     case MachineRepresentation::kWord32:
     case MachineRepresentation::kTagged:
+      return kPointerSize;
     case MachineRepresentation::kFloat32:
+// TODO(bbudge) Eliminate this when FP register aliasing works.
+#if V8_TARGET_ARCH_ARM
+      return kDoubleSize;
+#else
       return kPointerSize;
+#endif
     case MachineRepresentation::kWord64:
     case MachineRepresentation::kFloat64:
-      return 8;
+      return kDoubleSize;
     case MachineRepresentation::kSimd128:
-      return 16;
+      return kSimd128Size;
     case MachineRepresentation::kNone:
       break;
   }
   UNREACHABLE();
   return 0;
 }
 
 }  // namespace
 
 class LiveRangeBound {
@@ skipping 1236 matching lines @@
       code_(code),
       debug_name_(debug_name),
       config_(config),
       phi_map_(allocation_zone()),
       live_in_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()),
       live_out_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()),
       live_ranges_(code->VirtualRegisterCount() * 2, nullptr,
                    allocation_zone()),
       fixed_live_ranges_(this->config()->num_general_registers(), nullptr,
                          allocation_zone()),
-      fixed_float_live_ranges_(this->config()->num_float_registers(), nullptr,
-                               allocation_zone()),
       fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr,
                                 allocation_zone()),
-      fixed_simd128_live_ranges_(this->config()->num_simd128_registers(),
-                                 nullptr, allocation_zone()),
       spill_ranges_(code->VirtualRegisterCount(), nullptr, allocation_zone()),
       delayed_references_(allocation_zone()),
       assigned_registers_(nullptr),
       assigned_double_registers_(nullptr),
       virtual_register_count_(code->VirtualRegisterCount()),
       preassigned_slot_ranges_(zone) {
   assigned_registers_ = new (code_zone())
       BitVector(this->config()->num_general_registers(), code_zone());
   assigned_double_registers_ = new (code_zone())
       BitVector(this->config()->num_double_registers(), code_zone());
@@ skipping 157 matching lines @@
   DCHECK(!range->IsSplinter());
   SpillRange* spill_range =
       new (allocation_zone()) SpillRange(range, allocation_zone());
   return spill_range;
 }
 
 void RegisterAllocationData::MarkAllocated(MachineRepresentation rep,
                                            int index) {
   switch (rep) {
     case MachineRepresentation::kFloat32:
+    case MachineRepresentation::kFloat64:
     case MachineRepresentation::kSimd128:
-      if (kSimpleFPAliasing) {
-        assigned_double_registers_->Add(index);
-      } else {
-        int alias_base_index = -1;
-        int aliases = config()->GetAliases(
-            rep, index, MachineRepresentation::kFloat64, &alias_base_index);
-        DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1));
-        while (aliases--) {
-          int aliased_reg = alias_base_index + aliases;
-          assigned_double_registers_->Add(aliased_reg);
-        }
-      }
-      break;
-    case MachineRepresentation::kFloat64:
       assigned_double_registers_->Add(index);
       break;
     default:
       DCHECK(!IsFloatingPoint(rep));
       assigned_registers_->Add(index);
       break;
   }
 }
 
 bool RegisterAllocationData::IsBlockBoundary(LifetimePosition pos) const {
@@ skipping 306 matching lines @@
     TopLevelLiveRange* range = data()->GetOrCreateLiveRangeFor(operand_index);
     range->AddUseInterval(start, end, allocation_zone());
     iterator.Advance();
   }
 }
 
 int LiveRangeBuilder::FixedFPLiveRangeID(int index, MachineRepresentation rep) {
   int result = -index - 1;
   switch (rep) {
     case MachineRepresentation::kSimd128:
-      result -= config()->num_float_registers();
-    // Fall through.
     case MachineRepresentation::kFloat32:
-      result -= config()->num_double_registers();
-    // Fall through.
     case MachineRepresentation::kFloat64:
       result -= config()->num_general_registers();
       break;
     default:
       UNREACHABLE();
       break;
   }
   return result;
 }
 
 TopLevelLiveRange* LiveRangeBuilder::FixedLiveRangeFor(int index) {
   DCHECK(index < config()->num_general_registers());
   TopLevelLiveRange* result = data()->fixed_live_ranges()[index];
   if (result == nullptr) {
     MachineRepresentation rep = InstructionSequence::DefaultRepresentation();
     result = data()->NewLiveRange(FixedLiveRangeID(index), rep);
     DCHECK(result->IsFixed());
     result->set_assigned_register(index);
     data()->MarkAllocated(rep, index);
     data()->fixed_live_ranges()[index] = result;
   }
   return result;
 }
 
 TopLevelLiveRange* LiveRangeBuilder::FixedFPLiveRangeFor(
     int index, MachineRepresentation rep) {
   TopLevelLiveRange* result = nullptr;
   switch (rep) {
     case MachineRepresentation::kFloat32:
-      DCHECK(rep == MachineRepresentation::kFloat32);
-      DCHECK(index < config()->num_float_registers());
-      result = data()->fixed_float_live_ranges()[index];
-      if (result == nullptr) {
-        result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep);
-        DCHECK(result->IsFixed());
-        result->set_assigned_register(index);
-        data()->MarkAllocated(rep, index);
-        data()->fixed_float_live_ranges()[index] = result;
-      }
-      break;
     case MachineRepresentation::kFloat64:
+    case MachineRepresentation::kSimd128:
       DCHECK(index < config()->num_double_registers());
       result = data()->fixed_double_live_ranges()[index];
       if (result == nullptr) {
         result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep);
         DCHECK(result->IsFixed());
         result->set_assigned_register(index);
         data()->MarkAllocated(rep, index);
         data()->fixed_double_live_ranges()[index] = result;
       }
       break;
-    case MachineRepresentation::kSimd128:
-      DCHECK(index < config()->num_simd128_registers());
-      result = data()->fixed_simd128_live_ranges()[index];
-      if (result == nullptr) {
-        result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep);
-        DCHECK(result->IsFixed());
-        result->set_assigned_register(index);
-        data()->MarkAllocated(rep, index);
-        data()->fixed_simd128_live_ranges()[index] = result;
-      }
-      break;
     default:
       UNREACHABLE();
       break;
   }
   return result;
 }
 
 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) {
   if (operand->IsUnallocated()) {
     return data()->GetOrCreateLiveRangeFor(
@@ skipping 106 matching lines @@
         // is OK because AddUseInterval will just merge it with the existing
         // one at the end of the range.
         int code = config()->GetAllocatableGeneralCode(i);
         TopLevelLiveRange* range = FixedLiveRangeFor(code);
         range->AddUseInterval(curr_position, curr_position.End(),
                               allocation_zone());
       }
     }
 
     if (instr->ClobbersDoubleRegisters()) {
-      for (int i = 0; i < config()->num_allocatable_double_registers(); ++i) {
+      for (int i = 0; i < config()->num_allocatable_aliased_double_registers();
+           ++i) {
         // Add a UseInterval for all DoubleRegisters. See comment above for
         // general registers.
         int code = config()->GetAllocatableDoubleCode(i);
         TopLevelLiveRange* range =
             FixedFPLiveRangeFor(code, MachineRepresentation::kFloat64);
         range->AddUseInterval(curr_position, curr_position.End(),
                               allocation_zone());
       }
-      // Preserve fixed float registers on archs with non-simple aliasing.
-      if (!kSimpleFPAliasing) {
-        for (int i = 0; i < config()->num_allocatable_float_registers(); ++i) {
-          // Add a UseInterval for all FloatRegisters. See comment above for
-          // general registers.
-          int code = config()->GetAllocatableFloatCode(i);
-          TopLevelLiveRange* range =
-              FixedFPLiveRangeFor(code, MachineRepresentation::kFloat32);
-          range->AddUseInterval(curr_position, curr_position.End(),
-                                allocation_zone());
-        }
-        for (int i = 0; i < config()->num_allocatable_simd128_registers();
-             ++i) {
-          int code = config()->GetAllocatableSimd128Code(i);
-          TopLevelLiveRange* range =
-              FixedFPLiveRangeFor(code, MachineRepresentation::kSimd128);
-          range->AddUseInterval(curr_position, curr_position.End(),
-                                allocation_zone());
-        }
-      }
     }
 
     for (size_t i = 0; i < instr->InputCount(); i++) {
       InstructionOperand* input = instr->InputAt(i);
       if (input->IsImmediate() || input->IsExplicit()) {
         continue;  // Ignore immediates and explicitly reserved registers.
       }
       LifetimePosition use_pos;
       if (input->IsUnallocated() &&
           UnallocatedOperand::cast(input)->IsUsedAtStart()) {
@@ skipping 543 matching lines @@
     }
   }
   SortUnhandled();
   DCHECK(UnhandledIsSorted());
 
   if (mode() == GENERAL_REGISTERS) {
     for (TopLevelLiveRange* current : data()->fixed_live_ranges()) {
       if (current != nullptr) AddToInactive(current);
     }
   } else {
-    for (TopLevelLiveRange* current : data()->fixed_float_live_ranges()) {
-      if (current != nullptr) AddToInactive(current);
-    }
     for (TopLevelLiveRange* current : data()->fixed_double_live_ranges()) {
       if (current != nullptr) AddToInactive(current);
     }
-    for (TopLevelLiveRange* current : data()->fixed_simd128_live_ranges()) {
-      if (current != nullptr) AddToInactive(current);
-    }
   }
 
   while (!unhandled_live_ranges().empty()) {
     DCHECK(UnhandledIsSorted());
     LiveRange* current = unhandled_live_ranges().back();
     unhandled_live_ranges().pop_back();
     DCHECK(UnhandledIsSorted());
     LifetimePosition position = current->Start();
 #ifdef DEBUG
     allocation_finger_ = position;
@@ skipping 146 matching lines @@
 
 void LinearScanAllocator::InactiveToActive(LiveRange* range) {
   RemoveElement(&inactive_live_ranges(), range);
   active_live_ranges().push_back(range);
   TRACE("Moving live range %d:%d from inactive to active\n",
         range->TopLevel()->vreg(), range->relative_id());
 }
 
 
 bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
-  MachineRepresentation rep = current->representation();
   int num_regs = num_registers();
   int num_codes = num_allocatable_registers();
   const int* codes = allocatable_register_codes();
-  if (!kSimpleFPAliasing) {
-    if (rep == MachineRepresentation::kFloat32) {
-      num_regs = data()->config()->num_float_registers();
-      num_codes = data()->config()->num_allocatable_float_registers();
-      codes = data()->config()->allocatable_float_codes();
-    } else if (rep == MachineRepresentation::kSimd128) {
-      num_regs = data()->config()->num_simd128_registers();
-      num_codes = data()->config()->num_allocatable_simd128_registers();
-      codes = data()->config()->allocatable_simd128_codes();
-    }
-  }
 
   LifetimePosition free_until_pos[RegisterConfiguration::kMaxFPRegisters];
   for (int i = 0; i < num_regs; i++) {
     free_until_pos[i] = LifetimePosition::MaxPosition();
   }
 
   for (LiveRange* cur_active : active_live_ranges()) {
     int cur_reg = cur_active->assigned_register();
-    if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
-      free_until_pos[cur_reg] = LifetimePosition::GapFromInstructionIndex(0);
-      TRACE("Register %s is free until pos %d (1)\n", RegisterName(cur_reg),
-            LifetimePosition::GapFromInstructionIndex(0).value());
-    } else {
-      int alias_base_index = -1;
-      int aliases = data()->config()->GetAliases(
-          cur_active->representation(), cur_reg, rep, &alias_base_index);
-      DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1));
-      while (aliases--) {
-        int aliased_reg = alias_base_index + aliases;
-        free_until_pos[aliased_reg] =
-            LifetimePosition::GapFromInstructionIndex(0);
-      }
-    }
+    free_until_pos[cur_reg] = LifetimePosition::GapFromInstructionIndex(0);
+    TRACE("Register %s is free until pos %d (1)\n", RegisterName(cur_reg),
+          LifetimePosition::GapFromInstructionIndex(0).value());
   }
 
   for (LiveRange* cur_inactive : inactive_live_ranges()) {
     DCHECK(cur_inactive->End() > current->Start());
     LifetimePosition next_intersection =
         cur_inactive->FirstIntersection(current);
     if (!next_intersection.IsValid()) continue;
     int cur_reg = cur_inactive->assigned_register();
-    if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
-      free_until_pos[cur_reg] = Min(free_until_pos[cur_reg], next_intersection);
-      TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg),
-            Min(free_until_pos[cur_reg], next_intersection).value());
-    } else {
-      int alias_base_index = -1;
-      int aliases = data()->config()->GetAliases(
-          cur_inactive->representation(), cur_reg, rep, &alias_base_index);
-      DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1));
-      while (aliases--) {
-        int aliased_reg = alias_base_index + aliases;
-        free_until_pos[aliased_reg] =
-            Min(free_until_pos[aliased_reg], next_intersection);
-      }
-    }
+    free_until_pos[cur_reg] = Min(free_until_pos[cur_reg], next_intersection);
+    TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg),
+          Min(free_until_pos[cur_reg], next_intersection).value());
   }
 
   int hint_register;
   if (current->FirstHintPosition(&hint_register) != nullptr) {
     TRACE(
         "Found reg hint %s (free until [%d) for live range %d:%d (end %d[).\n",
         RegisterName(hint_register), free_until_pos[hint_register].value(),
         current->TopLevel()->vreg(), current->relative_id(),
         current->End().value());
 
@@ skipping 43 matching lines @@
 
 void LinearScanAllocator::AllocateBlockedReg(LiveRange* current) {
   UsePosition* register_use = current->NextRegisterPosition(current->Start());
   if (register_use == nullptr) {
     // There is no use in the current live range that requires a register.
     // We can just spill it.
     Spill(current);
     return;
   }
 
-  MachineRepresentation rep = current->representation();
   int num_regs = num_registers();
   int num_codes = num_allocatable_registers();
   const int* codes = allocatable_register_codes();
-  if (!kSimpleFPAliasing) {
-    if (rep == MachineRepresentation::kFloat32) {
-      num_regs = data()->config()->num_float_registers();
-      num_codes = data()->config()->num_allocatable_float_registers();
-      codes = data()->config()->allocatable_float_codes();
-    } else if (rep == MachineRepresentation::kSimd128) {
-      num_regs = data()->config()->num_simd128_registers();
-      num_codes = data()->config()->num_allocatable_simd128_registers();
-      codes = data()->config()->allocatable_simd128_codes();
-    }
-  }
 
   LifetimePosition use_pos[RegisterConfiguration::kMaxFPRegisters];
   LifetimePosition block_pos[RegisterConfiguration::kMaxFPRegisters];
   for (int i = 0; i < num_regs; i++) {
     use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition();
   }
 
   for (LiveRange* range : active_live_ranges()) {
     int cur_reg = range->assigned_register();
     bool is_fixed_or_cant_spill =
         range->TopLevel()->IsFixed() || !range->CanBeSpilled(current->Start());
-    if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
-      if (is_fixed_or_cant_spill) {
-        block_pos[cur_reg] = use_pos[cur_reg] =
-            LifetimePosition::GapFromInstructionIndex(0);
+    if (is_fixed_or_cant_spill) {
+      block_pos[cur_reg] = use_pos[cur_reg] =
+          LifetimePosition::GapFromInstructionIndex(0);
+    } else {
+      UsePosition* next_use =
+          range->NextUsePositionRegisterIsBeneficial(current->Start());
+      if (next_use == nullptr) {
+        use_pos[cur_reg] = range->End();
       } else {
-        UsePosition* next_use =
-            range->NextUsePositionRegisterIsBeneficial(current->Start());
-        if (next_use == nullptr) {
-          use_pos[cur_reg] = range->End();
-        } else {
-          use_pos[cur_reg] = next_use->pos();
-        }
-      }
-    } else {
-      int alias_base_index = -1;
-      int aliases = data()->config()->GetAliases(
-          range->representation(), cur_reg, rep, &alias_base_index);
-      DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1));
-      while (aliases--) {
-        int aliased_reg = alias_base_index + aliases;
-        if (is_fixed_or_cant_spill) {
-          block_pos[aliased_reg] = use_pos[aliased_reg] =
-              LifetimePosition::GapFromInstructionIndex(0);
-        } else {
-          UsePosition* next_use =
-              range->NextUsePositionRegisterIsBeneficial(current->Start());
-          if (next_use == nullptr) {
-            use_pos[aliased_reg] = range->End();
-          } else {
-            use_pos[aliased_reg] = next_use->pos();
-          }
-        }
+        use_pos[cur_reg] = next_use->pos();
       }
     }
   }
 
   for (LiveRange* range : inactive_live_ranges()) {
     DCHECK(range->End() > current->Start());
     LifetimePosition next_intersection = range->FirstIntersection(current);
     if (!next_intersection.IsValid()) continue;
     int cur_reg = range->assigned_register();
     bool is_fixed = range->TopLevel()->IsFixed();
-    if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
-      if (is_fixed) {
-        block_pos[cur_reg] = Min(block_pos[cur_reg], next_intersection);
-        use_pos[cur_reg] = Min(block_pos[cur_reg], use_pos[cur_reg]);
-      } else {
-        use_pos[cur_reg] = Min(use_pos[cur_reg], next_intersection);
-      }
+    if (is_fixed) {
+      block_pos[cur_reg] = Min(block_pos[cur_reg], next_intersection);
+      use_pos[cur_reg] = Min(block_pos[cur_reg], use_pos[cur_reg]);
     } else {
-      int alias_base_index = -1;
-      int aliases = data()->config()->GetAliases(
-          range->representation(), cur_reg, rep, &alias_base_index);
-      DCHECK(aliases > 0 || (aliases == 0 && alias_base_index == -1));
-      while (aliases--) {
-        int aliased_reg = alias_base_index + aliases;
-        if (is_fixed) {
-          block_pos[aliased_reg] =
-              Min(block_pos[aliased_reg], next_intersection);
-          use_pos[aliased_reg] =
-              Min(block_pos[aliased_reg], use_pos[aliased_reg]);
-        } else {
-          use_pos[aliased_reg] = Min(use_pos[aliased_reg], next_intersection);
-        }
-      }
+      use_pos[cur_reg] = Min(use_pos[cur_reg], next_intersection);
     }
   }
 
   int reg = codes[0];
   for (int i = 1; i < num_codes; ++i) {
     int code = codes[i];
     if (use_pos[code] > use_pos[reg]) {
       reg = code;
     }
   }
@@ skipping 31 matching lines @@
   SplitAndSpillIntersecting(current);
 }
 
 
 void LinearScanAllocator::SplitAndSpillIntersecting(LiveRange* current) {
   DCHECK(current->HasRegisterAssigned());
   int reg = current->assigned_register();
   LifetimePosition split_pos = current->Start();
   for (size_t i = 0; i < active_live_ranges().size(); ++i) {
     LiveRange* range = active_live_ranges()[i];
-    if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
-      if (range->assigned_register() != reg) continue;
-    } else {
-      if (!data()->config()->AreAliases(current->representation(), reg,
-                                        range->representation(),
-                                        range->assigned_register())) {
-        continue;
-      }
-    }
+    if (range->assigned_register() != reg) continue;
 
     UsePosition* next_pos = range->NextRegisterPosition(current->Start());
     LifetimePosition spill_pos = FindOptimalSpillingPos(range, split_pos);
     if (next_pos == nullptr) {
       SpillAfter(range, spill_pos);
     } else {
       // When spilling between spill_pos and next_pos ensure that the range
       // remains spilled at least until the start of the current live range.
       // This guarantees that we will not introduce new unhandled ranges that
       // start before the current range as this violates allocation invariants
       // and will lead to an inconsistent state of active and inactive
       // live-ranges: ranges are allocated in order of their start positions,
       // ranges are retired from active/inactive when the start of the
       // current live-range is larger than their end.
       DCHECK(LifetimePosition::ExistsGapPositionBetween(current->Start(),
                                                         next_pos->pos()));
       SpillBetweenUntil(range, spill_pos, current->Start(), next_pos->pos());
     }
     ActiveToHandled(range);
     --i;
   }
 
   for (size_t i = 0; i < inactive_live_ranges().size(); ++i) {
     LiveRange* range = inactive_live_ranges()[i];
     DCHECK(range->End() > current->Start());
     if (range->TopLevel()->IsFixed()) continue;
-    if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
-      if (range->assigned_register() != reg) continue;
-    } else {
-      if (!data()->config()->AreAliases(current->representation(), reg,
-                                        range->representation(),
-                                        range->assigned_register()))
-        continue;
-    }
+    if (range->assigned_register() != reg) continue;
 
     LifetimePosition next_intersection = range->FirstIntersection(current);
     if (next_intersection.IsValid()) {
       UsePosition* next_pos = range->NextRegisterPosition(current->Start());
       if (next_pos == nullptr) {
         SpillAfter(range, split_pos);
       } else {
         next_intersection = Min(next_intersection, next_pos->pos());
         SpillBetween(range, split_pos, next_intersection);
       }
@@ skipping 642 matching lines @@
         }
       }
     }
   }
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8