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Unified Diff: src/IceRegAlloc.h

Issue 2172313002: Subzero : Live Range Splitting after initial Register Allocation (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Cleanup Created 4 years, 5 months ago
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Index: src/IceRegAlloc.h
diff --git a/src/IceRegAlloc.h b/src/IceRegAlloc.h
index fb1a0d86560ab858920049679573a89b3e57a19b..4738ba81fc858ce7a83d862d032c6ae7b7831e4a 100644
--- a/src/IceRegAlloc.h
+++ b/src/IceRegAlloc.h
@@ -32,7 +32,8 @@ class LinearScan {
public:
explicit LinearScan(Cfg *Func);
- void init(RegAllocKind Kind);
+ void init(RegAllocKind Kind, CfgSet<Variable *> ExtraVars = {},
+ CfgSet<Variable *> ExcludeVars = {});
void scan(const SmallBitVector &RegMask, bool Randomized);
// Returns the number of times some variable has been assigned a register but
// later evicted because of a higher-priority allocation. The idea is that we
@@ -40,6 +41,7 @@ public:
// until there are no more evictions.
SizeT getNumEvictions() const { return Evicted.size(); }
bool hasEvictions() const { return !Evicted.empty(); }
+ void setSplittingMode() { SplittingMode = true; }
void dump(Cfg *Func) const;
// TODO(stichnot): Statically choose the size based on the target being
@@ -131,9 +133,10 @@ private:
llvm::SmallVector<const SmallBitVector *, REGS_SIZE> RegAliases;
bool FindPreference = false;
bool FindOverlap = false;
-
const bool Verbose;
const bool UseReserve;
+ bool SplittingMode = false;
+ CfgVector<Variable *> Vars;
};
} // end of namespace Ice

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