Subzero : Live Range Splitting after initial Register Allocation

src/IceTargetLoweringX86Base.h

 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 75 matching lines @@
   bool needSandboxing() const { return NeedSandboxing; }
 
   void translateOm1() override;
   void translateO2() override;
   void doLoadOpt();
   bool doBranchOpt(Inst *I, const CfgNode *NextNode) override;
 
   SizeT getNumRegisters() const override {
     return Traits::RegisterSet::Reg_NUM;
   }
+
+  Inst *createLoweredMove(Variable *Dest, Variable *SrcVar) override {
+    if (isVectorType(Dest->getType())) {
+      return Traits::Insts::Movp::create(Func, Dest, SrcVar);
+    }
+    return Traits::Insts::Mov::create(Func, Dest, SrcVar);
+    (void)Dest;
+    (void)SrcVar;
+    return nullptr;
+  }
+
   Variable *getPhysicalRegister(RegNumT RegNum,
                                 Type Ty = IceType_void) override;
   const char *getRegName(RegNumT RegNum, Type Ty) const override;
   static const char *getRegClassName(RegClass C) {
     auto ClassNum = static_cast<RegClassX86>(C);
     assert(ClassNum < RCX86_NUM);
     switch (ClassNum) {
     default:
       assert(C < RC_Target);
       return regClassString(C);
@@ skipping 1063 matching lines @@
 
   explicit TargetHeaderX86(GlobalContext *Ctx) : TargetHeaderLowering(Ctx) {}
 };
 
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #include "IceTargetLoweringX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H