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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2170343002: [turbofan] Change Float64Max/Float64Min to JavaScript semantics. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: mips/mips64 ports. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
(...skipping 1113 matching lines...) Expand 10 before | Expand all | Expand 10 after
1124 } 1124 }
1125 1125
1126 1126
1127 void VisitRR(InstructionSelector* selector, Node* node, 1127 void VisitRR(InstructionSelector* selector, Node* node,
1128 InstructionCode opcode) { 1128 InstructionCode opcode) {
1129 X64OperandGenerator g(selector); 1129 X64OperandGenerator g(selector);
1130 selector->Emit(opcode, g.DefineAsRegister(node), 1130 selector->Emit(opcode, g.DefineAsRegister(node),
1131 g.UseRegister(node->InputAt(0))); 1131 g.UseRegister(node->InputAt(0)));
1132 } 1132 }
1133 1133
1134 void VisitRRO(InstructionSelector* selector, Node* node,
1135 InstructionCode opcode) {
1136 X64OperandGenerator g(selector);
1137 selector->Emit(opcode, g.DefineSameAsFirst(node),
1138 g.UseRegister(node->InputAt(0)), g.Use(node->InputAt(1)));
1139 }
1134 1140
1135 void VisitFloatBinop(InstructionSelector* selector, Node* node, 1141 void VisitFloatBinop(InstructionSelector* selector, Node* node,
1136 ArchOpcode avx_opcode, ArchOpcode sse_opcode) { 1142 ArchOpcode avx_opcode, ArchOpcode sse_opcode) {
1137 X64OperandGenerator g(selector); 1143 X64OperandGenerator g(selector);
1138 InstructionOperand operand0 = g.UseRegister(node->InputAt(0)); 1144 InstructionOperand operand0 = g.UseRegister(node->InputAt(0));
1139 InstructionOperand operand1 = g.Use(node->InputAt(1)); 1145 InstructionOperand operand1 = g.Use(node->InputAt(1));
1140 if (selector->IsSupported(AVX)) { 1146 if (selector->IsSupported(AVX)) {
1141 selector->Emit(avx_opcode, g.DefineAsRegister(node), operand0, operand1); 1147 selector->Emit(avx_opcode, g.DefineAsRegister(node), operand0, operand1);
1142 } else { 1148 } else {
1143 selector->Emit(sse_opcode, g.DefineSameAsFirst(node), operand0, operand1); 1149 selector->Emit(sse_opcode, g.DefineSameAsFirst(node), operand0, operand1);
(...skipping 136 matching lines...) Expand 10 before | Expand all | Expand 10 after
1280 void InstructionSelector::VisitFloat32Mul(Node* node) { 1286 void InstructionSelector::VisitFloat32Mul(Node* node) {
1281 VisitFloatBinop(this, node, kAVXFloat32Mul, kSSEFloat32Mul); 1287 VisitFloatBinop(this, node, kAVXFloat32Mul, kSSEFloat32Mul);
1282 } 1288 }
1283 1289
1284 1290
1285 void InstructionSelector::VisitFloat32Div(Node* node) { 1291 void InstructionSelector::VisitFloat32Div(Node* node) {
1286 VisitFloatBinop(this, node, kAVXFloat32Div, kSSEFloat32Div); 1292 VisitFloatBinop(this, node, kAVXFloat32Div, kSSEFloat32Div);
1287 } 1293 }
1288 1294
1289 1295
1290 void InstructionSelector::VisitFloat32Max(Node* node) {
1291 VisitFloatBinop(this, node, kAVXFloat32Max, kSSEFloat32Max);
1292 }
1293
1294
1295 void InstructionSelector::VisitFloat32Min(Node* node) {
1296 VisitFloatBinop(this, node, kAVXFloat32Min, kSSEFloat32Min);
1297 }
1298
1299
1300 void InstructionSelector::VisitFloat32Abs(Node* node) { 1296 void InstructionSelector::VisitFloat32Abs(Node* node) {
1301 VisitFloatUnop(this, node, node->InputAt(0), kAVXFloat32Abs, kSSEFloat32Abs); 1297 VisitFloatUnop(this, node, node->InputAt(0), kAVXFloat32Abs, kSSEFloat32Abs);
1302 } 1298 }
1303 1299
1304 1300
1305 void InstructionSelector::VisitFloat32Sqrt(Node* node) { 1301 void InstructionSelector::VisitFloat32Sqrt(Node* node) {
1306 VisitRO(this, node, kSSEFloat32Sqrt); 1302 VisitRO(this, node, kSSEFloat32Sqrt);
1307 } 1303 }
1308 1304
1309 1305
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
1352 void InstructionSelector::VisitFloat64Mod(Node* node) { 1348 void InstructionSelector::VisitFloat64Mod(Node* node) {
1353 X64OperandGenerator g(this); 1349 X64OperandGenerator g(this);
1354 InstructionOperand temps[] = {g.TempRegister(rax)}; 1350 InstructionOperand temps[] = {g.TempRegister(rax)};
1355 Emit(kSSEFloat64Mod, g.DefineSameAsFirst(node), 1351 Emit(kSSEFloat64Mod, g.DefineSameAsFirst(node),
1356 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 1, 1352 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), 1,
1357 temps); 1353 temps);
1358 } 1354 }
1359 1355
1360 1356
1361 void InstructionSelector::VisitFloat64Max(Node* node) { 1357 void InstructionSelector::VisitFloat64Max(Node* node) {
1362 VisitFloatBinop(this, node, kAVXFloat64Max, kSSEFloat64Max); 1358 VisitRRO(this, node, kSSEFloat64Max);
1363 } 1359 }
1364 1360
1365 1361
1366 void InstructionSelector::VisitFloat64Min(Node* node) { 1362 void InstructionSelector::VisitFloat64Min(Node* node) {
1367 VisitFloatBinop(this, node, kAVXFloat64Min, kSSEFloat64Min); 1363 VisitRRO(this, node, kSSEFloat64Min);
1368 } 1364 }
1369 1365
1370 1366
1371 void InstructionSelector::VisitFloat64Abs(Node* node) { 1367 void InstructionSelector::VisitFloat64Abs(Node* node) {
1372 VisitFloatUnop(this, node, node->InputAt(0), kAVXFloat64Abs, kSSEFloat64Abs); 1368 VisitFloatUnop(this, node, node->InputAt(0), kAVXFloat64Abs, kSSEFloat64Abs);
1373 } 1369 }
1374 1370
1375 void InstructionSelector::VisitFloat64Sqrt(Node* node) { 1371 void InstructionSelector::VisitFloat64Sqrt(Node* node) {
1376 VisitRO(this, node, kSSEFloat64Sqrt); 1372 VisitRO(this, node, kSSEFloat64Sqrt);
1377 } 1373 }
(...skipping 745 matching lines...) Expand 10 before | Expand all | Expand 10 after
2123 } 2119 }
2124 inputs[input_count++] = g.UseUniqueRegister(value); 2120 inputs[input_count++] = g.UseUniqueRegister(value);
2125 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); 2121 InstructionCode code = opcode | AddressingModeField::encode(addressing_mode);
2126 Emit(code, 0, static_cast<InstructionOperand*>(nullptr), input_count, inputs); 2122 Emit(code, 0, static_cast<InstructionOperand*>(nullptr), input_count, inputs);
2127 } 2123 }
2128 2124
2129 // static 2125 // static
2130 MachineOperatorBuilder::Flags 2126 MachineOperatorBuilder::Flags
2131 InstructionSelector::SupportedMachineOperatorFlags() { 2127 InstructionSelector::SupportedMachineOperatorFlags() {
2132 MachineOperatorBuilder::Flags flags = 2128 MachineOperatorBuilder::Flags flags =
2133 MachineOperatorBuilder::kFloat32Max |
2134 MachineOperatorBuilder::kFloat32Min |
2135 MachineOperatorBuilder::kFloat64Max |
2136 MachineOperatorBuilder::kFloat64Min |
2137 MachineOperatorBuilder::kWord32ShiftIsSafe | 2129 MachineOperatorBuilder::kWord32ShiftIsSafe |
2138 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz; 2130 MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz;
2139 if (CpuFeatures::IsSupported(POPCNT)) { 2131 if (CpuFeatures::IsSupported(POPCNT)) {
2140 flags |= MachineOperatorBuilder::kWord32Popcnt | 2132 flags |= MachineOperatorBuilder::kWord32Popcnt |
2141 MachineOperatorBuilder::kWord64Popcnt; 2133 MachineOperatorBuilder::kWord64Popcnt;
2142 } 2134 }
2143 if (CpuFeatures::IsSupported(SSE4_1)) { 2135 if (CpuFeatures::IsSupported(SSE4_1)) {
2144 flags |= MachineOperatorBuilder::kFloat32RoundDown | 2136 flags |= MachineOperatorBuilder::kFloat32RoundDown |
2145 MachineOperatorBuilder::kFloat64RoundDown | 2137 MachineOperatorBuilder::kFloat64RoundDown |
2146 MachineOperatorBuilder::kFloat32RoundUp | 2138 MachineOperatorBuilder::kFloat32RoundUp |
2147 MachineOperatorBuilder::kFloat64RoundUp | 2139 MachineOperatorBuilder::kFloat64RoundUp |
2148 MachineOperatorBuilder::kFloat32RoundTruncate | 2140 MachineOperatorBuilder::kFloat32RoundTruncate |
2149 MachineOperatorBuilder::kFloat64RoundTruncate | 2141 MachineOperatorBuilder::kFloat64RoundTruncate |
2150 MachineOperatorBuilder::kFloat32RoundTiesEven | 2142 MachineOperatorBuilder::kFloat32RoundTiesEven |
2151 MachineOperatorBuilder::kFloat64RoundTiesEven; 2143 MachineOperatorBuilder::kFloat64RoundTiesEven;
2152 } 2144 }
2153 return flags; 2145 return flags;
2154 } 2146 }
2155 2147
2156 // static 2148 // static
2157 MachineOperatorBuilder::AlignmentRequirements 2149 MachineOperatorBuilder::AlignmentRequirements
2158 InstructionSelector::AlignmentRequirements() { 2150 InstructionSelector::AlignmentRequirements() {
2159 return MachineOperatorBuilder::AlignmentRequirements:: 2151 return MachineOperatorBuilder::AlignmentRequirements::
2160 FullUnalignedAccessSupport(); 2152 FullUnalignedAccessSupport();
2161 } 2153 }
2162 2154
2163 } // namespace compiler 2155 } // namespace compiler
2164 } // namespace internal 2156 } // namespace internal
2165 } // namespace v8 2157 } // namespace v8
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