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Side by Side Diff: src/compiler/x64/instruction-codes-x64.h

Issue 2170343002: [turbofan] Change Float64Max/Float64Min to JavaScript semantics. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: mips/mips64 ports. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 46 matching lines...) Expand 10 before | Expand all | Expand 10 after
57 V(X64Popcnt) \ 57 V(X64Popcnt) \
58 V(X64Popcnt32) \ 58 V(X64Popcnt32) \
59 V(SSEFloat32Cmp) \ 59 V(SSEFloat32Cmp) \
60 V(SSEFloat32Add) \ 60 V(SSEFloat32Add) \
61 V(SSEFloat32Sub) \ 61 V(SSEFloat32Sub) \
62 V(SSEFloat32Mul) \ 62 V(SSEFloat32Mul) \
63 V(SSEFloat32Div) \ 63 V(SSEFloat32Div) \
64 V(SSEFloat32Abs) \ 64 V(SSEFloat32Abs) \
65 V(SSEFloat32Neg) \ 65 V(SSEFloat32Neg) \
66 V(SSEFloat32Sqrt) \ 66 V(SSEFloat32Sqrt) \
67 V(SSEFloat32Max) \
68 V(SSEFloat32Min) \
69 V(SSEFloat32ToFloat64) \ 67 V(SSEFloat32ToFloat64) \
70 V(SSEFloat32ToInt32) \ 68 V(SSEFloat32ToInt32) \
71 V(SSEFloat32ToUint32) \ 69 V(SSEFloat32ToUint32) \
72 V(SSEFloat32Round) \ 70 V(SSEFloat32Round) \
73 V(SSEFloat64Cmp) \ 71 V(SSEFloat64Cmp) \
74 V(SSEFloat64Add) \ 72 V(SSEFloat64Add) \
75 V(SSEFloat64Sub) \ 73 V(SSEFloat64Sub) \
76 V(SSEFloat64Mul) \ 74 V(SSEFloat64Mul) \
77 V(SSEFloat64Div) \ 75 V(SSEFloat64Div) \
78 V(SSEFloat64Mod) \ 76 V(SSEFloat64Mod) \
(...skipping 22 matching lines...) Expand all
101 V(SSEFloat64ExtractHighWord32) \ 99 V(SSEFloat64ExtractHighWord32) \
102 V(SSEFloat64InsertLowWord32) \ 100 V(SSEFloat64InsertLowWord32) \
103 V(SSEFloat64InsertHighWord32) \ 101 V(SSEFloat64InsertHighWord32) \
104 V(SSEFloat64LoadLowWord32) \ 102 V(SSEFloat64LoadLowWord32) \
105 V(SSEFloat64SilenceNaN) \ 103 V(SSEFloat64SilenceNaN) \
106 V(AVXFloat32Cmp) \ 104 V(AVXFloat32Cmp) \
107 V(AVXFloat32Add) \ 105 V(AVXFloat32Add) \
108 V(AVXFloat32Sub) \ 106 V(AVXFloat32Sub) \
109 V(AVXFloat32Mul) \ 107 V(AVXFloat32Mul) \
110 V(AVXFloat32Div) \ 108 V(AVXFloat32Div) \
111 V(AVXFloat32Max) \
112 V(AVXFloat32Min) \
113 V(AVXFloat64Cmp) \ 109 V(AVXFloat64Cmp) \
114 V(AVXFloat64Add) \ 110 V(AVXFloat64Add) \
115 V(AVXFloat64Sub) \ 111 V(AVXFloat64Sub) \
116 V(AVXFloat64Mul) \ 112 V(AVXFloat64Mul) \
117 V(AVXFloat64Div) \ 113 V(AVXFloat64Div) \
118 V(AVXFloat64Max) \
119 V(AVXFloat64Min) \
120 V(AVXFloat64Abs) \ 114 V(AVXFloat64Abs) \
121 V(AVXFloat64Neg) \ 115 V(AVXFloat64Neg) \
122 V(AVXFloat32Abs) \ 116 V(AVXFloat32Abs) \
123 V(AVXFloat32Neg) \ 117 V(AVXFloat32Neg) \
124 V(X64Movsxbl) \ 118 V(X64Movsxbl) \
125 V(X64Movzxbl) \ 119 V(X64Movzxbl) \
126 V(X64Movb) \ 120 V(X64Movb) \
127 V(X64Movsxwl) \ 121 V(X64Movsxwl) \
128 V(X64Movzxwl) \ 122 V(X64Movzxwl) \
129 V(X64Movw) \ 123 V(X64Movw) \
(...skipping 47 matching lines...) Expand 10 before | Expand all | Expand 10 after
177 V(M1I) /* [ %r2*1 + K] */ \ 171 V(M1I) /* [ %r2*1 + K] */ \
178 V(M2I) /* [ %r2*2 + K] */ \ 172 V(M2I) /* [ %r2*2 + K] */ \
179 V(M4I) /* [ %r2*4 + K] */ \ 173 V(M4I) /* [ %r2*4 + K] */ \
180 V(M8I) /* [ %r2*8 + K] */ 174 V(M8I) /* [ %r2*8 + K] */
181 175
182 } // namespace compiler 176 } // namespace compiler
183 } // namespace internal 177 } // namespace internal
184 } // namespace v8 178 } // namespace v8
185 179
186 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 180 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
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