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Side by Side Diff: src/compiler/opcodes.h

Issue 2170343002: [turbofan] Change Float64Max/Float64Min to JavaScript semantics. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: mips/mips64 ports. Created 4 years, 5 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_OPCODES_H_ 5 #ifndef V8_COMPILER_OPCODES_H_
6 #define V8_COMPILER_OPCODES_H_ 6 #define V8_COMPILER_OPCODES_H_
7 7
8 #include <iosfwd> 8 #include <iosfwd>
9 9
10 // Opcodes for control operators. 10 // Opcodes for control operators.
(...skipping 230 matching lines...) Expand 10 before | Expand all | Expand 10 after
241 V(NumberAsinh) \ 241 V(NumberAsinh) \
242 V(NumberAtan) \ 242 V(NumberAtan) \
243 V(NumberAtanh) \ 243 V(NumberAtanh) \
244 V(NumberAtan2) \ 244 V(NumberAtan2) \
245 V(NumberExp) \ 245 V(NumberExp) \
246 V(NumberExpm1) \ 246 V(NumberExpm1) \
247 V(NumberLog) \ 247 V(NumberLog) \
248 V(NumberLog1p) \ 248 V(NumberLog1p) \
249 V(NumberLog2) \ 249 V(NumberLog2) \
250 V(NumberLog10) \ 250 V(NumberLog10) \
251 V(NumberMax) \
252 V(NumberMin) \
251 V(NumberCbrt) \ 253 V(NumberCbrt) \
252 V(NumberPow) \ 254 V(NumberPow) \
253 V(NumberRound) \ 255 V(NumberRound) \
254 V(NumberSign) \ 256 V(NumberSign) \
255 V(NumberSin) \ 257 V(NumberSin) \
256 V(NumberSinh) \ 258 V(NumberSinh) \
257 V(NumberSqrt) \ 259 V(NumberSqrt) \
258 V(NumberTan) \ 260 V(NumberTan) \
259 V(NumberTanh) \ 261 V(NumberTanh) \
260 V(NumberTrunc) \ 262 V(NumberTrunc) \
(...skipping 127 matching lines...) Expand 10 before | Expand all | Expand 10 after
388 V(BitcastFloat32ToInt32) \ 390 V(BitcastFloat32ToInt32) \
389 V(BitcastFloat64ToInt64) \ 391 V(BitcastFloat64ToInt64) \
390 V(BitcastInt32ToFloat32) \ 392 V(BitcastInt32ToFloat32) \
391 V(BitcastInt64ToFloat64) \ 393 V(BitcastInt64ToFloat64) \
392 V(Float32Add) \ 394 V(Float32Add) \
393 V(Float32Sub) \ 395 V(Float32Sub) \
394 V(Float32SubPreserveNan) \ 396 V(Float32SubPreserveNan) \
395 V(Float32Neg) \ 397 V(Float32Neg) \
396 V(Float32Mul) \ 398 V(Float32Mul) \
397 V(Float32Div) \ 399 V(Float32Div) \
398 V(Float32Max) \
399 V(Float32Min) \
400 V(Float32Abs) \ 400 V(Float32Abs) \
401 V(Float32Sqrt) \ 401 V(Float32Sqrt) \
402 V(Float32RoundDown) \ 402 V(Float32RoundDown) \
403 V(Float64Add) \ 403 V(Float64Add) \
404 V(Float64Sub) \ 404 V(Float64Sub) \
405 V(Float64SubPreserveNan) \ 405 V(Float64SubPreserveNan) \
406 V(Float64Neg) \ 406 V(Float64Neg) \
407 V(Float64Mul) \ 407 V(Float64Mul) \
408 V(Float64Div) \ 408 V(Float64Div) \
409 V(Float64Mod) \ 409 V(Float64Mod) \
(...skipping 312 matching lines...) Expand 10 before | Expand all | Expand 10 after
722 } 722 }
723 }; 723 };
724 724
725 std::ostream& operator<<(std::ostream&, IrOpcode::Value); 725 std::ostream& operator<<(std::ostream&, IrOpcode::Value);
726 726
727 } // namespace compiler 727 } // namespace compiler
728 } // namespace internal 728 } // namespace internal
729 } // namespace v8 729 } // namespace v8
730 730
731 #endif // V8_COMPILER_OPCODES_H_ 731 #endif // V8_COMPILER_OPCODES_H_
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