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Side by Side Diff: src/compiler/common-operator-reducer.cc

Issue 2170343002: [turbofan] Change Float64Max/Float64Min to JavaScript semantics. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: mips/mips64 ports. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/common-operator-reducer.h" 5 #include "src/compiler/common-operator-reducer.h"
6 6
7 #include <algorithm> 7 #include <algorithm>
8 8
9 #include "src/compiler/common-operator.h" 9 #include "src/compiler/common-operator.h"
10 #include "src/compiler/graph.h" 10 #include "src/compiler/graph.h"
(...skipping 229 matching lines...) Expand 10 before | Expand all | Expand 10 after
240 Float32BinopMatcher mcond(cond); 240 Float32BinopMatcher mcond(cond);
241 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) && 241 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) &&
242 vfalse->opcode() == IrOpcode::kFloat32Sub) { 242 vfalse->opcode() == IrOpcode::kFloat32Sub) {
243 Float32BinopMatcher mvfalse(vfalse); 243 Float32BinopMatcher mvfalse(vfalse);
244 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) { 244 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) {
245 // We might now be able to further reduce the {merge} node. 245 // We might now be able to further reduce the {merge} node.
246 Revisit(merge); 246 Revisit(merge);
247 return Change(node, machine()->Float32Abs(), vtrue); 247 return Change(node, machine()->Float32Abs(), vtrue);
248 } 248 }
249 } 249 }
250 if (mcond.left().Equals(vtrue) && mcond.right().Equals(vfalse) &&
251 machine()->Float32Min().IsSupported()) {
252 // We might now be able to further reduce the {merge} node.
253 Revisit(merge);
254 return Change(node, machine()->Float32Min().op(), vtrue, vfalse);
255 } else if (mcond.left().Equals(vfalse) && mcond.right().Equals(vtrue) &&
256 machine()->Float32Max().IsSupported()) {
257 // We might now be able to further reduce the {merge} node.
258 Revisit(merge);
259 return Change(node, machine()->Float32Max().op(), vtrue, vfalse);
260 }
261 } else if (cond->opcode() == IrOpcode::kFloat64LessThan) { 250 } else if (cond->opcode() == IrOpcode::kFloat64LessThan) {
262 Float64BinopMatcher mcond(cond); 251 Float64BinopMatcher mcond(cond);
263 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) && 252 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) &&
264 vfalse->opcode() == IrOpcode::kFloat64Sub) { 253 vfalse->opcode() == IrOpcode::kFloat64Sub) {
265 Float64BinopMatcher mvfalse(vfalse); 254 Float64BinopMatcher mvfalse(vfalse);
266 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) { 255 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) {
267 // We might now be able to further reduce the {merge} node. 256 // We might now be able to further reduce the {merge} node.
268 Revisit(merge); 257 Revisit(merge);
269 return Change(node, machine()->Float64Abs(), vtrue); 258 return Change(node, machine()->Float64Abs(), vtrue);
270 } 259 }
271 } 260 }
272 if (mcond.left().Equals(vtrue) && mcond.right().Equals(vfalse) &&
273 machine()->Float64Min().IsSupported()) {
274 // We might now be able to further reduce the {merge} node.
275 Revisit(merge);
276 return Change(node, machine()->Float64Min().op(), vtrue, vfalse);
277 } else if (mcond.left().Equals(vfalse) && mcond.right().Equals(vtrue) &&
278 machine()->Float64Max().IsSupported()) {
279 // We might now be able to further reduce the {merge} node.
280 Revisit(merge);
281 return Change(node, machine()->Float64Max().op(), vtrue, vfalse);
282 }
283 } 261 }
284 } 262 }
285 } 263 }
286 Node* const value = node->InputAt(0); 264 Node* const value = node->InputAt(0);
287 DCHECK_NE(node, value); 265 DCHECK_NE(node, value);
288 for (int i = 1; i < input_count; ++i) { 266 for (int i = 1; i < input_count; ++i) {
289 Node* const input = node->InputAt(i); 267 Node* const input = node->InputAt(i);
290 if (input == node) { 268 if (input == node) {
291 // Ignore redundant inputs. 269 // Ignore redundant inputs.
292 DCHECK_EQ(IrOpcode::kLoop, merge->opcode()); 270 DCHECK_EQ(IrOpcode::kLoop, merge->opcode());
(...skipping 65 matching lines...) Expand 10 before | Expand all | Expand 10 after
358 switch (cond->opcode()) { 336 switch (cond->opcode()) {
359 case IrOpcode::kFloat32LessThan: { 337 case IrOpcode::kFloat32LessThan: {
360 Float32BinopMatcher mcond(cond); 338 Float32BinopMatcher mcond(cond);
361 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) && 339 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) &&
362 vfalse->opcode() == IrOpcode::kFloat32Sub) { 340 vfalse->opcode() == IrOpcode::kFloat32Sub) {
363 Float32BinopMatcher mvfalse(vfalse); 341 Float32BinopMatcher mvfalse(vfalse);
364 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) { 342 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) {
365 return Change(node, machine()->Float32Abs(), vtrue); 343 return Change(node, machine()->Float32Abs(), vtrue);
366 } 344 }
367 } 345 }
368 if (mcond.left().Equals(vtrue) && mcond.right().Equals(vfalse) &&
369 machine()->Float32Min().IsSupported()) {
370 return Change(node, machine()->Float32Min().op(), vtrue, vfalse);
371 } else if (mcond.left().Equals(vfalse) && mcond.right().Equals(vtrue) &&
372 machine()->Float32Max().IsSupported()) {
373 return Change(node, machine()->Float32Max().op(), vtrue, vfalse);
374 }
375 break; 346 break;
376 } 347 }
377 case IrOpcode::kFloat64LessThan: { 348 case IrOpcode::kFloat64LessThan: {
378 Float64BinopMatcher mcond(cond); 349 Float64BinopMatcher mcond(cond);
379 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) && 350 if (mcond.left().Is(0.0) && mcond.right().Equals(vtrue) &&
380 vfalse->opcode() == IrOpcode::kFloat64Sub) { 351 vfalse->opcode() == IrOpcode::kFloat64Sub) {
381 Float64BinopMatcher mvfalse(vfalse); 352 Float64BinopMatcher mvfalse(vfalse);
382 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) { 353 if (mvfalse.left().IsZero() && mvfalse.right().Equals(vtrue)) {
383 return Change(node, machine()->Float64Abs(), vtrue); 354 return Change(node, machine()->Float64Abs(), vtrue);
384 } 355 }
385 } 356 }
386 if (mcond.left().Equals(vtrue) && mcond.right().Equals(vfalse) &&
387 machine()->Float64Min().IsSupported()) {
388 return Change(node, machine()->Float64Min().op(), vtrue, vfalse);
389 } else if (mcond.left().Equals(vfalse) && mcond.right().Equals(vtrue) &&
390 machine()->Float64Max().IsSupported()) {
391 return Change(node, machine()->Float64Max().op(), vtrue, vfalse);
392 }
393 break; 357 break;
394 } 358 }
395 default: 359 default:
396 break; 360 break;
397 } 361 }
398 return NoChange(); 362 return NoChange();
399 } 363 }
400 364
401 365
402 Reduction CommonOperatorReducer::Change(Node* node, Operator const* op, 366 Reduction CommonOperatorReducer::Change(Node* node, Operator const* op,
(...skipping 10 matching lines...) Expand all
413 node->ReplaceInput(0, a); 377 node->ReplaceInput(0, a);
414 node->ReplaceInput(1, b); 378 node->ReplaceInput(1, b);
415 node->TrimInputCount(2); 379 node->TrimInputCount(2);
416 NodeProperties::ChangeOp(node, op); 380 NodeProperties::ChangeOp(node, op);
417 return Changed(node); 381 return Changed(node);
418 } 382 }
419 383
420 } // namespace compiler 384 } // namespace compiler
421 } // namespace internal 385 } // namespace internal
422 } // namespace v8 386 } // namespace v8
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