[turbofan] Change Float64Max/Float64Min to JavaScript semantics.

src/compiler/arm/instruction-selector-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/base/bits.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
@@ skipping 1372 matching lines @@
   VisitRRR(this, kArmVdivF64, node);
 }
 
 
 void InstructionSelector::VisitFloat64Mod(Node* node) {
   ArmOperandGenerator g(this);
   Emit(kArmVmodF64, g.DefineAsFixed(node, d0), g.UseFixed(node->InputAt(0), d0),
        g.UseFixed(node->InputAt(1), d1))->MarkAsCall();
 }
 
-void InstructionSelector::VisitFloat32Max(Node* node) {
-  DCHECK(IsSupported(ARMv8));
-  VisitRRR(this, kArmFloat32Max, node);
-}
-
 void InstructionSelector::VisitFloat64Max(Node* node) {
-  DCHECK(IsSupported(ARMv8));
   VisitRRR(this, kArmFloat64Max, node);
 }
 
 void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
   VisitRR(this, kArmFloat64SilenceNaN, node);
 }
 
-void InstructionSelector::VisitFloat32Min(Node* node) {
-  DCHECK(IsSupported(ARMv8));
-  VisitRRR(this, kArmFloat32Min, node);
-}
-
 void InstructionSelector::VisitFloat64Min(Node* node) {
-  DCHECK(IsSupported(ARMv8));
   VisitRRR(this, kArmFloat64Min, node);
 }
 
 void InstructionSelector::VisitFloat32Abs(Node* node) {
   VisitRR(this, kArmVabsF32, node);
 }
 
 
 void InstructionSelector::VisitFloat64Abs(Node* node) {
   VisitRR(this, kArmVabsF64, node);
@@ skipping 743 matching lines @@
   if (CpuFeatures::IsSupported(ARMv8)) {
     flags |= MachineOperatorBuilder::kFloat32RoundDown |
              MachineOperatorBuilder::kFloat64RoundDown |
              MachineOperatorBuilder::kFloat32RoundUp |
              MachineOperatorBuilder::kFloat64RoundUp |
              MachineOperatorBuilder::kFloat32RoundTruncate |
              MachineOperatorBuilder::kFloat64RoundTruncate |
              MachineOperatorBuilder::kFloat64RoundTiesAway |
              MachineOperatorBuilder::kFloat32RoundTiesEven |
              MachineOperatorBuilder::kFloat64RoundTiesEven |
-             MachineOperatorBuilder::kFloat32Min |
-             MachineOperatorBuilder::kFloat32Max |
-             MachineOperatorBuilder::kFloat64Min |
-             MachineOperatorBuilder::kFloat64Max |
              MachineOperatorBuilder::kFloat32Neg |
              MachineOperatorBuilder::kFloat64Neg;
   }
   return flags;
 }
 
 // static
 MachineOperatorBuilder::AlignmentRequirements
 InstructionSelector::AlignmentRequirements() {
   return MachineOperatorBuilder::AlignmentRequirements::
       FullUnalignedAccessSupport();
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8