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Side by Side Diff: runtime/vm/constants_dbc.h

Issue 2162173002: DBC: Misc double instructions (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Make test deopt Created 4 years, 5 months ago
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1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_CONSTANTS_DBC_H_ 5 #ifndef VM_CONSTANTS_DBC_H_
6 #define VM_CONSTANTS_DBC_H_ 6 #define VM_CONSTANTS_DBC_H_
7 7
8 #include "platform/globals.h" 8 #include "platform/globals.h"
9 #include "platform/assert.h" 9 #include "platform/assert.h"
10 #include "platform/utils.h" 10 #include "platform/utils.h"
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181 // instruction (which implements a slow path fallback). 181 // instruction (which implements a slow path fallback).
182 // 182 //
183 // - Add, Sub, Mul, Div, Mod, Shl, Shr rA, rB, rC 183 // - Add, Sub, Mul, Div, Mod, Shl, Shr rA, rB, rC
184 // 184 //
185 // Arithmetic operations on Smis. FP[rA] <- FP[rB] op FP[rC]. 185 // Arithmetic operations on Smis. FP[rA] <- FP[rB] op FP[rC].
186 // If these instructions can trigger a deoptimization, the following 186 // If these instructions can trigger a deoptimization, the following
187 // instruction should be Deopt. If no deoptimization should be triggered, 187 // instruction should be Deopt. If no deoptimization should be triggered,
188 // the immediately following instruction is skipped. These instructions 188 // the immediately following instruction is skipped. These instructions
189 // expect their operands to be Smis, but don't check that they are. 189 // expect their operands to be Smis, but don't check that they are.
190 // 190 //
191 // - Min, Max rA, rB, rC
192 //
193 // FP[rA] <- {min, max}(FP[rB], FP[rC]). Assumes that FP[rB], and FP[rC] are
194 // Smis.
195 //
191 // - DAdd, DSub, DMul, DDiv rA, rB, rC 196 // - DAdd, DSub, DMul, DDiv rA, rB, rC
192 // 197 //
193 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC]. 198 // Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC].
194 // 199 //
195 // - Neg rA , rD 200 // - Neg rA , rD
196 // 201 //
197 // FP[rA] <- -FP[rD]. Assumes FP[rD] is a Smi. If there is no overflow the 202 // FP[rA] <- -FP[rD]. Assumes FP[rD] is a Smi. If there is no overflow the
198 // immediately following instruction is skipped. 203 // immediately following instruction is skipped.
199 // 204 //
200 // - DNeg rA, rD 205 // - DNeg rA, rD
201 // 206 //
202 // FP[rA] <- -FP[rD]. Assumes FP[rD] is an unboxed double. 207 // FP[rA] <- -FP[rD]. Assumes FP[rD] is an unboxed double.
203 // 208 //
209 // - DSqrt rA, rD
210 //
211 // FP[rA] <- sqrt(FP[rD]). Assumes FP[rD] is an unboxed double.
212 //
213 // - DMin, DMax rA, rB, rC
214 //
215 // FP[rA] <- {min, max}(FP[rB], FP[rC]). Assumes FP[rB] and FP[rC] are
216 // unboxed doubles.
217 //
204 // - BitOr, BitAnd, BitXor rA, rB, rC 218 // - BitOr, BitAnd, BitXor rA, rB, rC
205 // 219 //
206 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be 220 // FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be
207 // Smis, but don't check that they are. 221 // Smis, but don't check that they are.
208 // 222 //
209 // - BitNot rA, rD 223 // - BitNot rA, rD
210 // 224 //
211 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi. 225 // FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi.
212 // 226 //
213 // - WriteIntoDouble rA, rD 227 // - WriteIntoDouble rA, rD
214 // 228 //
215 // Box the double in FP[rD] with the result in FP[rA]. 229 // Box the double in FP[rD] with the result in FP[rA].
216 // 230 //
217 // - UnboxDouble rA, rD 231 // - UnboxDouble rA, rD
218 // 232 //
219 // Unbox the double in FP[rD] into FP[rA]. Assumes FP[rD] is a double. 233 // Unbox the double in FP[rD] into FP[rA]. Assumes FP[rD] is a double.
220 // 234 //
221 // - CheckedUnboxDouble rA, rD 235 // - CheckedUnboxDouble rA, rD
222 // 236 //
223 // Unboxes FP[rD] into FP[rA] and skips the following instruction unless 237 // Unboxes FP[rD] into FP[rA] and skips the following instruction unless
224 // FP[rD] is not a double or a Smi. When FP[rD] is a Smi, converts it to a 238 // FP[rD] is not a double or a Smi. When FP[rD] is a Smi, converts it to a
225 // double. 239 // double.
226 // 240 //
227 // - SmiToDouble rA, rD 241 // - SmiToDouble rA, rD
228 // 242 //
229 // Convert the Smi in FP[rD] to an unboxed double in FP[rA]. 243 // Convert the Smi in FP[rD] to an unboxed double in FP[rA].
230 // 244 //
245 // - DoubleToSmi rA, rD
246 //
247 // If the unboxed double in FP[rD] can be converted to a Smi in FP[rA], then
248 // this instruction does so, and skips the following instruction. Otherwise,
249 // the following instruction is not skipped.
250 //
231 // - StoreStaticT`OS D 251 // - StoreStaticT`OS D
232 // 252 //
233 // Stores TOS into the static field PP[D]. 253 // Stores TOS into the static field PP[D].
234 // 254 //
235 // - PushStatic 255 // - PushStatic
236 // 256 //
237 // Pushes value of the static field PP[D] on to the stack. 257 // Pushes value of the static field PP[D] on to the stack.
238 // 258 //
239 // - InitStaticTOS 259 // - InitStaticTOS
240 // 260 //
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556 V(Mul, A_B_C, reg, reg, reg) \ 576 V(Mul, A_B_C, reg, reg, reg) \
557 V(Div, A_B_C, reg, reg, reg) \ 577 V(Div, A_B_C, reg, reg, reg) \
558 V(Mod, A_B_C, reg, reg, reg) \ 578 V(Mod, A_B_C, reg, reg, reg) \
559 V(Shl, A_B_C, reg, reg, reg) \ 579 V(Shl, A_B_C, reg, reg, reg) \
560 V(Shr, A_B_C, reg, reg, reg) \ 580 V(Shr, A_B_C, reg, reg, reg) \
561 V(Neg, A_D, reg, reg, ___) \ 581 V(Neg, A_D, reg, reg, ___) \
562 V(BitOr, A_B_C, reg, reg, reg) \ 582 V(BitOr, A_B_C, reg, reg, reg) \
563 V(BitAnd, A_B_C, reg, reg, reg) \ 583 V(BitAnd, A_B_C, reg, reg, reg) \
564 V(BitXor, A_B_C, reg, reg, reg) \ 584 V(BitXor, A_B_C, reg, reg, reg) \
565 V(BitNot, A_D, reg, reg, ___) \ 585 V(BitNot, A_D, reg, reg, ___) \
586 V(Min, A_B_C, reg, reg, reg) \
587 V(Max, A_B_C, reg, reg, reg) \
566 V(WriteIntoDouble, A_D, reg, reg, ___) \ 588 V(WriteIntoDouble, A_D, reg, reg, ___) \
567 V(UnboxDouble, A_D, reg, reg, ___) \ 589 V(UnboxDouble, A_D, reg, reg, ___) \
568 V(CheckedUnboxDouble, A_D, reg, reg, ___) \ 590 V(CheckedUnboxDouble, A_D, reg, reg, ___) \
569 V(SmiToDouble, A_D, reg, reg, ___) \ 591 V(SmiToDouble, A_D, reg, reg, ___) \
592 V(DoubleToSmi, A_D, reg, reg, ___) \
570 V(DAdd, A_B_C, reg, reg, reg) \ 593 V(DAdd, A_B_C, reg, reg, reg) \
571 V(DSub, A_B_C, reg, reg, reg) \ 594 V(DSub, A_B_C, reg, reg, reg) \
572 V(DMul, A_B_C, reg, reg, reg) \ 595 V(DMul, A_B_C, reg, reg, reg) \
573 V(DDiv, A_B_C, reg, reg, reg) \ 596 V(DDiv, A_B_C, reg, reg, reg) \
574 V(DNeg, A_D, reg, reg, ___) \ 597 V(DNeg, A_D, reg, reg, ___) \
598 V(DSqrt, A_D, reg, reg, ___) \
599 V(DMin, A_B_C, reg, reg, reg) \
600 V(DMax, A_B_C, reg, reg, reg) \
575 V(StoreStaticTOS, D, lit, ___, ___) \ 601 V(StoreStaticTOS, D, lit, ___, ___) \
576 V(PushStatic, D, lit, ___, ___) \ 602 V(PushStatic, D, lit, ___, ___) \
577 V(InitStaticTOS, 0, ___, ___, ___) \ 603 V(InitStaticTOS, 0, ___, ___, ___) \
578 V(IfNeStrictTOS, 0, ___, ___, ___) \ 604 V(IfNeStrictTOS, 0, ___, ___, ___) \
579 V(IfEqStrictTOS, 0, ___, ___, ___) \ 605 V(IfEqStrictTOS, 0, ___, ___, ___) \
580 V(IfNeStrictNumTOS, 0, ___, ___, ___) \ 606 V(IfNeStrictNumTOS, 0, ___, ___, ___) \
581 V(IfEqStrictNumTOS, 0, ___, ___, ___) \ 607 V(IfEqStrictNumTOS, 0, ___, ___, ___) \
582 V(IfNeStrict, A_D, reg, reg, ___) \ 608 V(IfNeStrict, A_D, reg, reg, ___) \
583 V(IfEqStrict, A_D, reg, reg, ___) \ 609 V(IfEqStrict, A_D, reg, reg, ___) \
584 V(IfLe, A_D, reg, reg, ___) \ 610 V(IfLe, A_D, reg, reg, ___) \
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752 778
753 // After a comparison, the condition NEXT_IS_TRUE means the following 779 // After a comparison, the condition NEXT_IS_TRUE means the following
754 // instruction is executed if the comparision is true and skipped over overwise. 780 // instruction is executed if the comparision is true and skipped over overwise.
755 // Conidition NEXT_IS_FALSE means the following instruction is executed if the 781 // Conidition NEXT_IS_FALSE means the following instruction is executed if the
756 // comparison is false and skipped over otherwise. 782 // comparison is false and skipped over otherwise.
757 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE }; 783 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE };
758 784
759 } // namespace dart 785 } // namespace dart
760 786
761 #endif // VM_CONSTANTS_DBC_H_ 787 #endif // VM_CONSTANTS_DBC_H_
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