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Issue 2160573003: S390: Fix convertion from int32 to float32 (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: more fix Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> // For assert 5 #include <assert.h> // For assert
6 #include <limits.h> // For LONG_MIN, LONG_MAX. 6 #include <limits.h> // For LONG_MIN, LONG_MAX.
7 7
8 #if V8_TARGET_ARCH_S390 8 #if V8_TARGET_ARCH_S390
9 9
10 #include "src/base/bits.h" 10 #include "src/base/bits.h"
(...skipping 638 matching lines...) Expand 10 before | Expand all | Expand 10 after
649 cdlfbr(Condition(5), Condition(0), dst, src); 649 cdlfbr(Condition(5), Condition(0), dst, src);
650 } else { 650 } else {
651 // zero-extend src 651 // zero-extend src
652 llgfr(src, src); 652 llgfr(src, src);
653 // convert to double 653 // convert to double
654 cdgbr(dst, src); 654 cdgbr(dst, src);
655 } 655 }
656 } 656 }
657 657
658 void MacroAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) { 658 void MacroAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) {
659 cefbr(dst, src); 659 cefbr(Condition(4), dst, src);
660 } 660 }
661 661
662 void MacroAssembler::ConvertUnsignedIntToFloat(Register src, 662 void MacroAssembler::ConvertUnsignedIntToFloat(Register src,
663 DoubleRegister dst) { 663 DoubleRegister dst) {
664 celfbr(Condition(0), Condition(0), dst, src); 664 celfbr(Condition(4), Condition(0), dst, src);
665 } 665 }
666 666
667 #if V8_TARGET_ARCH_S390X 667 #if V8_TARGET_ARCH_S390X
668 void MacroAssembler::ConvertInt64ToDouble(Register src, 668 void MacroAssembler::ConvertInt64ToDouble(Register src,
669 DoubleRegister double_dst) { 669 DoubleRegister double_dst) {
670 cdgbr(double_dst, src); 670 cdgbr(double_dst, src);
671 } 671 }
672 672
673 void MacroAssembler::ConvertUnsignedInt64ToFloat(Register src, 673 void MacroAssembler::ConvertUnsignedInt64ToFloat(Register src,
674 DoubleRegister double_dst) { 674 DoubleRegister double_dst) {
(...skipping 78 matching lines...) Expand 10 before | Expand all | Expand 10 after
753 void MacroAssembler::ConvertFloat32ToInt32(const DoubleRegister double_input, 753 void MacroAssembler::ConvertFloat32ToInt32(const DoubleRegister double_input,
754 const Register dst, 754 const Register dst,
755 const DoubleRegister double_dst, 755 const DoubleRegister double_dst,
756 FPRoundingMode rounding_mode) { 756 FPRoundingMode rounding_mode) {
757 Condition m = Condition(0); 757 Condition m = Condition(0);
758 switch (rounding_mode) { 758 switch (rounding_mode) {
759 case kRoundToZero: 759 case kRoundToZero:
760 m = Condition(5); 760 m = Condition(5);
761 break; 761 break;
762 case kRoundToNearest: 762 case kRoundToNearest:
763 UNIMPLEMENTED(); 763 m = Condition(4);
764 break; 764 break;
765 case kRoundToPlusInf: 765 case kRoundToPlusInf:
766 m = Condition(6); 766 m = Condition(6);
767 break; 767 break;
768 case kRoundToMinusInf: 768 case kRoundToMinusInf:
769 m = Condition(7); 769 m = Condition(7);
770 break; 770 break;
771 default: 771 default:
772 UNIMPLEMENTED(); 772 UNIMPLEMENTED();
773 break; 773 break;
774 } 774 }
775 cfebr(m, dst, double_input); 775 cfebr(m, dst, double_input);
776 Label done;
777 b(Condition(0xe), &done, Label::kNear); // special case
778 LoadImmP(dst, Operand::Zero());
779 bind(&done);
776 ldgr(double_dst, dst); 780 ldgr(double_dst, dst);
777 } 781 }
778 782
779 void MacroAssembler::ConvertFloat32ToUnsignedInt32( 783 void MacroAssembler::ConvertFloat32ToUnsignedInt32(
780 const DoubleRegister double_input, const Register dst, 784 const DoubleRegister double_input, const Register dst,
781 const DoubleRegister double_dst, FPRoundingMode rounding_mode) { 785 const DoubleRegister double_dst, FPRoundingMode rounding_mode) {
782 Condition m = Condition(0); 786 Condition m = Condition(0);
783 switch (rounding_mode) { 787 switch (rounding_mode) {
784 case kRoundToZero: 788 case kRoundToZero:
785 m = Condition(5); 789 m = Condition(5);
786 break; 790 break;
787 case kRoundToNearest: 791 case kRoundToNearest:
788 UNIMPLEMENTED(); 792 UNIMPLEMENTED();
789 break; 793 break;
790 case kRoundToPlusInf: 794 case kRoundToPlusInf:
791 m = Condition(6); 795 m = Condition(6);
792 break; 796 break;
793 case kRoundToMinusInf: 797 case kRoundToMinusInf:
794 m = Condition(7); 798 m = Condition(7);
795 break; 799 break;
796 default: 800 default:
797 UNIMPLEMENTED(); 801 UNIMPLEMENTED();
798 break; 802 break;
799 } 803 }
800 clfebr(m, Condition(0), dst, double_input); 804 clfebr(m, Condition(0), dst, double_input);
805 Label done;
806 b(Condition(0xe), &done, Label::kNear); // special case
807 LoadImmP(dst, Operand::Zero());
808 bind(&done);
801 ldgr(double_dst, dst); 809 ldgr(double_dst, dst);
802 } 810 }
803 811
804 #if V8_TARGET_ARCH_S390X 812 #if V8_TARGET_ARCH_S390X
805 void MacroAssembler::ConvertFloat32ToUnsignedInt64( 813 void MacroAssembler::ConvertFloat32ToUnsignedInt64(
806 const DoubleRegister double_input, const Register dst, 814 const DoubleRegister double_input, const Register dst,
807 const DoubleRegister double_dst, FPRoundingMode rounding_mode) { 815 const DoubleRegister double_dst, FPRoundingMode rounding_mode) {
808 Condition m = Condition(0); 816 Condition m = Condition(0);
809 switch (rounding_mode) { 817 switch (rounding_mode) {
810 case kRoundToZero: 818 case kRoundToZero:
(...skipping 4711 matching lines...) Expand 10 before | Expand all | Expand 10 after
5522 } 5530 }
5523 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); 5531 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift));
5524 ExtractBit(r0, dividend, 31); 5532 ExtractBit(r0, dividend, 31);
5525 AddP(result, r0); 5533 AddP(result, r0);
5526 } 5534 }
5527 5535
5528 } // namespace internal 5536 } // namespace internal
5529 } // namespace v8 5537 } // namespace v8
5530 5538
5531 #endif // V8_TARGET_ARCH_S390 5539 #endif // V8_TARGET_ARCH_S390
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