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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 2154703002: MIPS64: Fix 32bit right shift operators (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 1113 matching lines...) Expand 10 before | Expand all | Expand 10 after
1124 if (instr->InputAt(1)->IsRegister()) { 1124 if (instr->InputAt(1)->IsRegister()) {
1125 __ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 1125 __ sllv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1126 } else { 1126 } else {
1127 int64_t imm = i.InputOperand(1).immediate(); 1127 int64_t imm = i.InputOperand(1).immediate();
1128 __ sll(i.OutputRegister(), i.InputRegister(0), 1128 __ sll(i.OutputRegister(), i.InputRegister(0),
1129 static_cast<uint16_t>(imm)); 1129 static_cast<uint16_t>(imm));
1130 } 1130 }
1131 break; 1131 break;
1132 case kMips64Shr: 1132 case kMips64Shr:
1133 if (instr->InputAt(1)->IsRegister()) { 1133 if (instr->InputAt(1)->IsRegister()) {
1134 __ sll(i.InputRegister(0), i.InputRegister(0), 0x0);
1134 __ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 1135 __ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1135 } else { 1136 } else {
1136 int64_t imm = i.InputOperand(1).immediate(); 1137 int64_t imm = i.InputOperand(1).immediate();
1138 __ sll(i.InputRegister(0), i.InputRegister(0), 0x0);
1137 __ srl(i.OutputRegister(), i.InputRegister(0), 1139 __ srl(i.OutputRegister(), i.InputRegister(0),
1138 static_cast<uint16_t>(imm)); 1140 static_cast<uint16_t>(imm));
1139 } 1141 }
1140 break; 1142 break;
1141 case kMips64Sar: 1143 case kMips64Sar:
1142 if (instr->InputAt(1)->IsRegister()) { 1144 if (instr->InputAt(1)->IsRegister()) {
1145 __ sll(i.InputRegister(0), i.InputRegister(0), 0x0);
1143 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 1146 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
1144 } else { 1147 } else {
1145 int64_t imm = i.InputOperand(1).immediate(); 1148 int64_t imm = i.InputOperand(1).immediate();
1149 __ sll(i.InputRegister(0), i.InputRegister(0), 0x0);
1146 __ sra(i.OutputRegister(), i.InputRegister(0), 1150 __ sra(i.OutputRegister(), i.InputRegister(0),
1147 static_cast<uint16_t>(imm)); 1151 static_cast<uint16_t>(imm));
1148 } 1152 }
1149 break; 1153 break;
1150 case kMips64Ext: 1154 case kMips64Ext:
1151 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), 1155 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
1152 i.InputInt8(2)); 1156 i.InputInt8(2));
1153 break; 1157 break;
1154 case kMips64Ins: 1158 case kMips64Ins:
1155 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { 1159 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) {
(...skipping 1288 matching lines...) Expand 10 before | Expand all | Expand 10 after
2444 padding_size -= v8::internal::Assembler::kInstrSize; 2448 padding_size -= v8::internal::Assembler::kInstrSize;
2445 } 2449 }
2446 } 2450 }
2447 } 2451 }
2448 2452
2449 #undef __ 2453 #undef __
2450 2454
2451 } // namespace compiler 2455 } // namespace compiler
2452 } // namespace internal 2456 } // namespace internal
2453 } // namespace v8 2457 } // namespace v8
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