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| 1 ; This is a basic test of the alloca instruction. | 1 ; This is a basic test of the alloca instruction. |
| 2 | 2 |
| 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ | 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ |
| 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
| 6 | 6 |
| 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
| 8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ | 8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ |
| 9 ; RUN: | %if --need=target_X8632 --command FileCheck \ | 9 ; RUN: | %if --need=target_X8632 --command FileCheck \ |
| 10 ; RUN: --check-prefix CHECK-OPTM1 %s | 10 ; RUN: --check-prefix CHECK-OPTM1 %s |
| (...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 59 ; CHECK-OPTM1: mov DWORD PTR [esp],eax | 59 ; CHECK-OPTM1: mov DWORD PTR [esp],eax |
| 60 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 | 60 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 |
| 61 | 61 |
| 62 ; ARM32-LABEL: fixed_416_align_16 | 62 ; ARM32-LABEL: fixed_416_align_16 |
| 63 ; ARM32-OPT2: sub sp, sp, #428 | 63 ; ARM32-OPT2: sub sp, sp, #428 |
| 64 ; ARM32-OPTM1: sub sp, sp, #416 | 64 ; ARM32-OPTM1: sub sp, sp, #416 |
| 65 ; ARM32: bl {{.*}} R_{{.*}} f1 | 65 ; ARM32: bl {{.*}} R_{{.*}} f1 |
| 66 | 66 |
| 67 ; MIPS32-LABEL: fixed_416_align_16 | 67 ; MIPS32-LABEL: fixed_416_align_16 |
| 68 ; MIPS32-OPT2: addiu sp,sp,-440 | 68 ; MIPS32-OPT2: addiu sp,sp,-440 |
| 69 ; MIPS32-OPT2: addiu a0,sp,16 |
| 69 ; MIPS32-OPTM1: addiu sp,sp,-448 | 70 ; MIPS32-OPTM1: addiu sp,sp,-448 |
| 71 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,16 |
| 72 ; MIPS32-OPTM1: sw [[REG]],{{.*}} |
| 73 ; MIPS32-OPTM1: lw a0,{{.*}} |
| 74 ; MIPS32: jal {{.*}} R_{{.*}} f1 |
| 70 | 75 |
| 71 define internal void @fixed_416_align_32(i32 %n) { | 76 define internal void @fixed_416_align_32(i32 %n) { |
| 72 entry: | 77 entry: |
| 73 %array = alloca i8, i32 400, align 32 | 78 %array = alloca i8, i32 400, align 32 |
| 74 %__2 = ptrtoint i8* %array to i32 | 79 %__2 = ptrtoint i8* %array to i32 |
| 75 call void @f1(i32 %__2) | 80 call void @f1(i32 %__2) |
| 76 ret void | 81 ret void |
| 77 } | 82 } |
| 78 ; CHECK-LABEL: fixed_416_align_32 | 83 ; CHECK-LABEL: fixed_416_align_32 |
| 79 ; CHECK: push ebp | 84 ; CHECK: push ebp |
| 80 ; CHECK-NEXT: mov ebp,esp | 85 ; CHECK-NEXT: mov ebp,esp |
| 81 ; CHECK: sub esp,0x1b8 | 86 ; CHECK: sub esp,0x1b8 |
| 82 ; CHECK: and esp,0xffffffe0 | 87 ; CHECK: and esp,0xffffffe0 |
| 83 ; CHECK: lea eax,[esp+0x10] | 88 ; CHECK: lea eax,[esp+0x10] |
| 84 ; CHECK: mov DWORD PTR [esp],eax | 89 ; CHECK: mov DWORD PTR [esp],eax |
| 85 ; CHECK: call {{.*}} R_{{.*}} f1 | 90 ; CHECK: call {{.*}} R_{{.*}} f1 |
| 86 | 91 |
| 87 ; ARM32-LABEL: fixed_416_align_32 | 92 ; ARM32-LABEL: fixed_416_align_32 |
| 88 ; ARM32-OPT2: sub sp, sp, #424 | 93 ; ARM32-OPT2: sub sp, sp, #424 |
| 89 ; ARM32-OPTM1: sub sp, sp, #416 | 94 ; ARM32-OPTM1: sub sp, sp, #416 |
| 90 ; ARM32: bic sp, sp, #31 | 95 ; ARM32: bic sp, sp, #31 |
| 91 ; ARM32: bl {{.*}} R_{{.*}} f1 | 96 ; ARM32: bl {{.*}} R_{{.*}} f1 |
| 92 | 97 |
| 93 ; MIPS32-LABEL: fixed_416_align_32 | 98 ; MIPS32-LABEL: fixed_416_align_32 |
| 94 ; MIPS32-OPT2: addiu sp,sp,-440 | 99 ; MIPS32-OPT2: addiu sp,sp,-440 |
| 100 ; MIPS32-OPT2: addiu a0,sp,16 |
| 95 ; MIPS32-OPTM1: addiu sp,sp,-448 | 101 ; MIPS32-OPTM1: addiu sp,sp,-448 |
| 102 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,16 |
| 103 ; MIPS32-OPTM1: sw [[REG]],{{.*}} |
| 104 ; MIPS32-OPTM1: lw a0,{{.*}} |
| 105 ; MIPS32: jal {{.*}} R_{{.*}} f1 |
| 96 | 106 |
| 97 ; Show that the amount to allocate will be rounded up. | 107 ; Show that the amount to allocate will be rounded up. |
| 98 define internal void @fixed_351_align_16(i32 %n) { | 108 define internal void @fixed_351_align_16(i32 %n) { |
| 99 entry: | 109 entry: |
| 100 %array = alloca i8, i32 351, align 16 | 110 %array = alloca i8, i32 351, align 16 |
| 101 %__2 = ptrtoint i8* %array to i32 | 111 %__2 = ptrtoint i8* %array to i32 |
| 102 call void @f1(i32 %__2) | 112 call void @f1(i32 %__2) |
| 103 ret void | 113 ret void |
| 104 } | 114 } |
| 105 ; CHECK-LABEL: fixed_351_align_16 | 115 ; CHECK-LABEL: fixed_351_align_16 |
| 106 ; CHECK: sub esp,0x17c | 116 ; CHECK: sub esp,0x17c |
| 107 ; CHECK: lea eax,[esp+0x10] | 117 ; CHECK: lea eax,[esp+0x10] |
| 108 ; CHECK: mov DWORD PTR [esp],eax | 118 ; CHECK: mov DWORD PTR [esp],eax |
| 109 ; CHECK: call {{.*}} R_{{.*}} f1 | 119 ; CHECK: call {{.*}} R_{{.*}} f1 |
| 110 | 120 |
| 111 ; CHECK-OPTM1-LABEL: fixed_351_align_16 | 121 ; CHECK-OPTM1-LABEL: fixed_351_align_16 |
| 112 ; CHECK-OPTM1: sub esp,0x18 | 122 ; CHECK-OPTM1: sub esp,0x18 |
| 113 ; CHECK-OPTM1: sub esp,0x160 | 123 ; CHECK-OPTM1: sub esp,0x160 |
| 114 ; CHECK-OPTM1: mov DWORD PTR [esp],eax | 124 ; CHECK-OPTM1: mov DWORD PTR [esp],eax |
| 115 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 | 125 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 |
| 116 | 126 |
| 117 ; ARM32-LABEL: fixed_351_align_16 | 127 ; ARM32-LABEL: fixed_351_align_16 |
| 118 ; ARM32-OPT2: sub sp, sp, #364 | 128 ; ARM32-OPT2: sub sp, sp, #364 |
| 119 ; ARM32-OPTM1: sub sp, sp, #352 | 129 ; ARM32-OPTM1: sub sp, sp, #352 |
| 120 ; ARM32: bl {{.*}} R_{{.*}} f1 | 130 ; ARM32: bl {{.*}} R_{{.*}} f1 |
| 121 | 131 |
| 122 ; MIPS32-LABEL: fixed_351_align_16 | 132 ; MIPS32-LABEL: fixed_351_align_16 |
| 123 ; MIPS32-OPT2: addiu sp,sp,-376 | 133 ; MIPS32-OPT2: addiu sp,sp,-376 |
| 134 ; MIPS32-OPT2: addiu a0,sp,16 |
| 124 ; MIPS32-OPTM1: addiu sp,sp,-384 | 135 ; MIPS32-OPTM1: addiu sp,sp,-384 |
| 136 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,16 |
| 137 ; MIPS32-OPTM1: sw [[REG]],{{.*}} |
| 138 ; MIPS32-OPTM1: lw a0,{{.*}} |
| 139 ; MIPS32: jal {{.*}} R_{{.*}} f1 |
| 125 | 140 |
| 126 define internal void @fixed_351_align_32(i32 %n) { | 141 define internal void @fixed_351_align_32(i32 %n) { |
| 127 entry: | 142 entry: |
| 128 %array = alloca i8, i32 351, align 32 | 143 %array = alloca i8, i32 351, align 32 |
| 129 %__2 = ptrtoint i8* %array to i32 | 144 %__2 = ptrtoint i8* %array to i32 |
| 130 call void @f1(i32 %__2) | 145 call void @f1(i32 %__2) |
| 131 ret void | 146 ret void |
| 132 } | 147 } |
| 133 ; CHECK-LABEL: fixed_351_align_32 | 148 ; CHECK-LABEL: fixed_351_align_32 |
| 134 ; CHECK: push ebp | 149 ; CHECK: push ebp |
| 135 ; CHECK-NEXT: mov ebp,esp | 150 ; CHECK-NEXT: mov ebp,esp |
| 136 ; CHECK: sub esp,0x178 | 151 ; CHECK: sub esp,0x178 |
| 137 ; CHECK: and esp,0xffffffe0 | 152 ; CHECK: and esp,0xffffffe0 |
| 138 ; CHECK: lea eax,[esp+0x10] | 153 ; CHECK: lea eax,[esp+0x10] |
| 139 ; CHECK: mov DWORD PTR [esp],eax | 154 ; CHECK: mov DWORD PTR [esp],eax |
| 140 ; CHECK: call {{.*}} R_{{.*}} f1 | 155 ; CHECK: call {{.*}} R_{{.*}} f1 |
| 141 | 156 |
| 142 ; ARM32-LABEL: fixed_351_align_32 | 157 ; ARM32-LABEL: fixed_351_align_32 |
| 143 ; ARM32-OPT2: sub sp, sp, #360 | 158 ; ARM32-OPT2: sub sp, sp, #360 |
| 144 ; ARM32-OPTM1: sub sp, sp, #352 | 159 ; ARM32-OPTM1: sub sp, sp, #352 |
| 145 ; ARM32: bic sp, sp, #31 | 160 ; ARM32: bic sp, sp, #31 |
| 146 ; ARM32: bl {{.*}} R_{{.*}} f1 | 161 ; ARM32: bl {{.*}} R_{{.*}} f1 |
| 147 | 162 |
| 148 ; MIPS32-LABEL: fixed_351_align_32 | 163 ; MIPS32-LABEL: fixed_351_align_32 |
| 149 ; MIPS32-OPT2: addiu sp,sp,-376 | 164 ; MIPS32-OPT2: addiu sp,sp,-376 |
| 165 ; MIPS32-OPT2: addiu a0,sp,16 |
| 150 ; MIPS32-OPTM1: addiu sp,sp,-384 | 166 ; MIPS32-OPTM1: addiu sp,sp,-384 |
| 167 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,16 |
| 168 ; MIPS32-OPTM1: sw [[REG]],{{.*}} |
| 169 ; MIPS32-OPTM1: lw a0,{{.*}} |
| 170 ; MIPS32: jal {{.*}} R_{{.*}} f1 |
| 151 | 171 |
| 152 declare void @f1(i32 %ignored) | 172 declare void @f1(i32 %ignored) |
| 153 | 173 |
| 154 declare void @f2(i32 %ignored) | 174 declare void @f2(i32 %ignored) |
| 155 | 175 |
| 156 define internal void @variable_n_align_16(i32 %n) { | 176 define internal void @variable_n_align_16(i32 %n) { |
| 157 entry: | 177 entry: |
| 158 %array = alloca i8, i32 %n, align 16 | 178 %array = alloca i8, i32 %n, align 16 |
| 159 %__2 = ptrtoint i8* %array to i32 | 179 %__2 = ptrtoint i8* %array to i32 |
| 160 call void @f2(i32 %__2) | 180 call void @f2(i32 %__2) |
| (...skipping 217 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 378 %p1 = bitcast i8* %a1 to i32* | 398 %p1 = bitcast i8* %a1 to i32* |
| 379 %p2 = bitcast i8* %a2 to i32* | 399 %p2 = bitcast i8* %a2 to i32* |
| 380 %p3 = bitcast i8* %a3 to i32* | 400 %p3 = bitcast i8* %a3 to i32* |
| 381 store i32 %arg, i32* %p1, align 1 | 401 store i32 %arg, i32* %p1, align 1 |
| 382 store i32 %arg, i32* %p2, align 1 | 402 store i32 %arg, i32* %p2, align 1 |
| 383 store i32 %arg, i32* %p3, align 1 | 403 store i32 %arg, i32* %p3, align 1 |
| 384 ret void | 404 ret void |
| 385 } | 405 } |
| 386 ; CHECK-LABEL: var_with_frameptr | 406 ; CHECK-LABEL: var_with_frameptr |
| 387 ; CHECK: mov ebp,esp | 407 ; CHECK: mov ebp,esp |
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