[Subzero][MIPS32] Implement post lower legalizer for MIPS32

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 277 matching lines @@
     Func->advancedPhiLowering();
     Func->dump("After advanced Phi lowering");
   }
 
   // Stack frame mapping.
   Func->genFrame();
   if (Func->hasError())
     return;
   Func->dump("After stack frame mapping");
 
+  postLowerLegalization();
+  if (Func->hasError())
+    return;
+  Func->dump("After postLowerLegalization");
+
   Func->contractEmptyNodes();
   Func->reorderNodes();
 
   // Branch optimization. This needs to be done just before code emission. In
   // particular, no transformations that insert or reorder CfgNodes should be
   // done after branch optimization. We go ahead and do it before nop insertion
   // to reduce the amount of work needed for searching for opportunities.
   Func->doBranchOpt();
   Func->dump("After branch optimization");
 
@@ skipping 674 matching lines @@
     }
   }
 
   if (TotalStackSizeBytes) {
     _addiu(SP, SP, TotalStackSizeBytes);
   }
 
   return;
 }
 
+Variable *TargetMIPS32::PostLoweringLegalizer::newBaseRegister(
+    Variable *Base, int32_t Offset, RegNumT ScratchRegNum) {
+  // Legalize will likely need a lui/ori combination, but if the top bits are
+  // all 0 from negating the offset and subtracting, we could use that instead.
+  const bool ShouldSub = Offset != 0 && (-Offset & 0xFFFF0000) == 0;
+  Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum);
+  if (ShouldSub) {
+    Variable *OffsetVal =
+        Target->legalizeToReg(Target->Ctx->getConstantInt32(-Offset));
+    Target->_sub(ScratchReg, Base, OffsetVal);
+  } else {
+    Target->_addiu(ScratchReg, Base, Offset);
+  }
+
+  return ScratchReg;
+}
+
+void TargetMIPS32::PostLoweringLegalizer::legalizeMov(InstMIPS32Mov *MovInstr) {
+  Variable *Dest = MovInstr->getDest();
+  assert(Dest != nullptr);
+  Type DestTy = Dest->getType();

[Jim Stichnoth, 2016/07/14 00:34:45]

const Type ...

[sagar.thakur, 2016/07/14 11:57:00]

Done.

+  assert(DestTy != IceType_i64);

[Jim Stichnoth, 2016/07/14 00:34:45]

Also add "(void)DestTy;" to avoid a compiler warning in the MINIMAL=1 build.

[sagar.thakur, 2016/07/14 11:57:00]

Done.

+
+  Operand *Src = MovInstr->getSrc(0);
+  Type SrcTy = Src->getType();

[Jim Stichnoth, 2016/07/14 00:34:45]

const Type ...

[sagar.thakur, 2016/07/14 11:57:00]

Done.

+  (void)SrcTy;
+  assert(SrcTy != IceType_i64);
+
+  if (MovInstr->isMultiDest() || MovInstr->isMultiSource())
+    return;
+
+  bool Legalized = false;
+  if (!Dest->hasReg()) {
+    UnimplementedError(getFlags());

[Jim Stichnoth, 2016/07/14 00:34:45]

Is this case (dest variable without a register) going to be possible in the
future?

If yes: I prefer to structure this as "if (Dest->hasReg()) A; else B;" instead
of "if (!Dest->hasReg()) B; else A;".

If no: structure as "if (!Dest->hasReg()) {A; return;} ..." instead of "if (C) {
... return;} else ..."

I hope that's clear enough...

[sagar.thakur, 2016/07/14 11:57:00]

Yes, this case is possible. I have structured the if .... else as "if
(Dest->hasReg()) A; else B;"

+    return;
+  } else if (auto *Var = llvm::dyn_cast<Variable>(Src)) {
+    if (Var->isRematerializable()) {
+      // This is equivalent to an x86 _lea(RematOffset(%esp/%ebp), Variable).
+
+      // ExtraOffset is only needed for frame-pointer based frames as we have
+      // to account for spill storage.
+      const int32_t ExtraOffset = (Var->getRegNum() == Target->getFrameReg())
+                                      ? Target->getFrameFixedAllocaOffset()
+                                      : 0;
+
+      const int32_t Offset = Var->getStackOffset() + ExtraOffset;
+      Variable *Base = Target->getPhysicalRegister(Var->getRegNum());
+      Variable *T = newBaseRegister(Base, Offset, Dest->getRegNum());
+      Target->_mov(Dest, T);
+      Legalized = true;
+    } else {
+      if (!Var->hasReg()) {
+        UnimplementedError(getFlags());
+        return;
+      }
+    }
+  }
+
+  if (Legalized) {
+    if (MovInstr->isDestRedefined()) {
+      Target->_set_dest_redefined();
+    }
+    MovInstr->setDeleted();
+  }
+}
+
+void TargetMIPS32::postLowerLegalization() {
+  Func->dump("Before postLowerLegalization");
+  assert(hasComputedFrame());
+  for (CfgNode *Node : Func->getNodes()) {
+    Context.init(Node);
+    PostLoweringLegalizer Legalizer(this);
+    while (!Context.atEnd()) {
+      PostIncrLoweringContext PostIncrement(Context);
+      Inst *CurInstr = iteratorToInst(Context.getCur());
+
+      // TODO(sagar.thakur): Add remaining cases of legalization.
+
+      if (auto *MovInstr = llvm::dyn_cast<InstMIPS32Mov>(CurInstr)) {
+        Legalizer.legalizeMov(MovInstr);
+      }
+    }
+  }
+}
+
 Operand *TargetMIPS32::loOperand(Operand *Operand) {
   assert(Operand->getType() == IceType_i64);
   if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand))
     return Var64On32->getLo();
   if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
     return Ctx->getConstantInt32(static_cast<uint32_t>(Const->getValue()));
   }
   if (auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(Operand)) {
     // Conservatively disallow memory operands with side-effects (pre/post
     // increment) in case of duplication.
@@ skipping 408 matching lines @@
     }
     break;
   case InstArithmetic::Frem:
     break;
   }
   UnimplementedLoweringError(this, Instr);
 }
 
 void TargetMIPS32::lowerAssign(const InstAssign *Instr) {
   Variable *Dest = Instr->getDest();
+
+  if (Dest->isRematerializable()) {
+    Context.insert<InstFakeDef>(Dest);
+    return;
+  }
+
   Operand *Src0 = Instr->getSrc(0);
   assert(Dest->getType() == Src0->getType());
   if (Dest->getType() == IceType_i64) {
     Src0 = legalizeUndef(Src0);
     Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg);
     Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg);
     auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
     auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
     // Variable *T_Lo = nullptr, *T_Hi = nullptr;
     auto *T_Lo = I32Reg(), *T_Hi = I32Reg();
@@ skipping 1004 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice