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Side by Side Diff: src/compiler/mips64/instruction-selector-mips64.cc

Issue 2147883002: MIPS64: Implement Mips64And32, Mips64Or32, Mips64Nor32 and Mips64Xor32 operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Address comments. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
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312 uint32_t msb = base::bits::CountLeadingZeros32(~mask); 312 uint32_t msb = base::bits::CountLeadingZeros32(~mask);
313 if (shift != 0 && shift != 32 && msb + shift == 32) { 313 if (shift != 0 && shift != 32 && msb + shift == 32) {
314 // Insert zeros for (x >> K) << K => x & ~(2^K - 1) expression reduction 314 // Insert zeros for (x >> K) << K => x & ~(2^K - 1) expression reduction
315 // and remove constant loading of inverted mask. 315 // and remove constant loading of inverted mask.
316 Emit(kMips64Ins, g.DefineSameAsFirst(node), 316 Emit(kMips64Ins, g.DefineSameAsFirst(node),
317 g.UseRegister(m.left().node()), g.TempImmediate(0), 317 g.UseRegister(m.left().node()), g.TempImmediate(0),
318 g.TempImmediate(shift)); 318 g.TempImmediate(shift));
319 return; 319 return;
320 } 320 }
321 } 321 }
322 VisitBinop(this, node, kMips64And); 322 VisitBinop(this, node, kMips64And32);
323 } 323 }
324 324
325 325
326 void InstructionSelector::VisitWord64And(Node* node) { 326 void InstructionSelector::VisitWord64And(Node* node) {
327 Mips64OperandGenerator g(this); 327 Mips64OperandGenerator g(this);
328 Int64BinopMatcher m(node); 328 Int64BinopMatcher m(node);
329 if (m.left().IsWord64Shr() && CanCover(node, m.left().node()) && 329 if (m.left().IsWord64Shr() && CanCover(node, m.left().node()) &&
330 m.right().HasValue()) { 330 m.right().HasValue()) {
331 uint64_t mask = m.right().Value(); 331 uint64_t mask = m.right().Value();
332 uint32_t mask_width = base::bits::CountPopulation64(mask); 332 uint32_t mask_width = base::bits::CountPopulation64(mask);
(...skipping 35 matching lines...) Expand 10 before | Expand all | Expand 10 after
368 g.UseRegister(m.left().node()), g.TempImmediate(0), 368 g.UseRegister(m.left().node()), g.TempImmediate(0),
369 g.TempImmediate(shift)); 369 g.TempImmediate(shift));
370 return; 370 return;
371 } 371 }
372 } 372 }
373 VisitBinop(this, node, kMips64And); 373 VisitBinop(this, node, kMips64And);
374 } 374 }
375 375
376 376
377 void InstructionSelector::VisitWord32Or(Node* node) { 377 void InstructionSelector::VisitWord32Or(Node* node) {
378 VisitBinop(this, node, kMips64Or); 378 VisitBinop(this, node, kMips64Or32);
379 } 379 }
380 380
381 381
382 void InstructionSelector::VisitWord64Or(Node* node) { 382 void InstructionSelector::VisitWord64Or(Node* node) {
383 VisitBinop(this, node, kMips64Or); 383 VisitBinop(this, node, kMips64Or);
384 } 384 }
385 385
386 386
387 void InstructionSelector::VisitWord32Xor(Node* node) { 387 void InstructionSelector::VisitWord32Xor(Node* node) {
388 Int32BinopMatcher m(node); 388 Int32BinopMatcher m(node);
389 if (m.left().IsWord32Or() && CanCover(node, m.left().node()) && 389 if (m.left().IsWord32Or() && CanCover(node, m.left().node()) &&
390 m.right().Is(-1)) { 390 m.right().Is(-1)) {
391 Int32BinopMatcher mleft(m.left().node()); 391 Int32BinopMatcher mleft(m.left().node());
392 if (!mleft.right().HasValue()) { 392 if (!mleft.right().HasValue()) {
393 Mips64OperandGenerator g(this); 393 Mips64OperandGenerator g(this);
394 Emit(kMips64Nor, g.DefineAsRegister(node), 394 Emit(kMips64Nor32, g.DefineAsRegister(node),
395 g.UseRegister(mleft.left().node()), 395 g.UseRegister(mleft.left().node()),
396 g.UseRegister(mleft.right().node())); 396 g.UseRegister(mleft.right().node()));
397 return; 397 return;
398 } 398 }
399 } 399 }
400 if (m.right().Is(-1)) { 400 if (m.right().Is(-1)) {
401 // Use Nor for bit negation and eliminate constant loading for xori. 401 // Use Nor for bit negation and eliminate constant loading for xori.
402 Mips64OperandGenerator g(this); 402 Mips64OperandGenerator g(this);
403 Emit(kMips64Nor, g.DefineAsRegister(node), g.UseRegister(m.left().node()), 403 Emit(kMips64Nor32, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
404 g.TempImmediate(0)); 404 g.TempImmediate(0));
405 return; 405 return;
406 } 406 }
407 VisitBinop(this, node, kMips64Xor); 407 VisitBinop(this, node, kMips64Xor32);
408 } 408 }
409 409
410 410
411 void InstructionSelector::VisitWord64Xor(Node* node) { 411 void InstructionSelector::VisitWord64Xor(Node* node) {
412 Int64BinopMatcher m(node); 412 Int64BinopMatcher m(node);
413 if (m.left().IsWord64Or() && CanCover(node, m.left().node()) && 413 if (m.left().IsWord64Or() && CanCover(node, m.left().node()) &&
414 m.right().Is(-1)) { 414 m.right().Is(-1)) {
415 Int64BinopMatcher mleft(m.left().node()); 415 Int64BinopMatcher mleft(m.left().node());
416 if (!mleft.right().HasValue()) { 416 if (!mleft.right().HasValue()) {
417 Mips64OperandGenerator g(this); 417 Mips64OperandGenerator g(this);
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2093 } else { 2093 } else {
2094 DCHECK(kArchVariant == kMips64r2); 2094 DCHECK(kArchVariant == kMips64r2);
2095 return MachineOperatorBuilder::AlignmentRequirements:: 2095 return MachineOperatorBuilder::AlignmentRequirements::
2096 NoUnalignedAccessSupport(); 2096 NoUnalignedAccessSupport();
2097 } 2097 }
2098 } 2098 }
2099 2099
2100 } // namespace compiler 2100 } // namespace compiler
2101 } // namespace internal 2101 } // namespace internal
2102 } // namespace v8 2102 } // namespace v8
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