MIPS64: Implement Mips64And32, Mips64Or32, Mips64Nor32 and Mips64Xor32 operators.

src/compiler/mips64/instruction-selector-mips64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/base/bits.h"
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/node-properties.h"
 
@@ skipping 149 matching lines @@
     case MachineRepresentation::kBit:  // Fall through.
     case MachineRepresentation::kWord8:
       opcode = load_rep.IsUnsigned() ? kMips64Lbu : kMips64Lb;
       break;
     case MachineRepresentation::kWord16:
       opcode = load_rep.IsUnsigned() ? kMips64Lhu : kMips64Lh;
       break;
     case MachineRepresentation::kWord32:
       opcode = load_rep.IsUnsigned() ? kMips64Lwu : kMips64Lw;
       break;
+

[balazs.kilvady, 2016/07/13 08:21:28]

There are no newlines at other cases, please remove the above one.

[Marija Antic, 2016/07/13 08:32:37]

Done.

     case MachineRepresentation::kTagged:  // Fall through.
     case MachineRepresentation::kWord64:
       opcode = kMips64Ld;
       break;
     case MachineRepresentation::kSimd128:  // Fall through.
     case MachineRepresentation::kNone:
       UNREACHABLE();
       return;
   }
 
@@ skipping 61 matching lines @@
       case MachineRepresentation::kBit:  // Fall through.
       case MachineRepresentation::kWord8:
         opcode = kMips64Sb;
         break;
       case MachineRepresentation::kWord16:
         opcode = kMips64Sh;
         break;
       case MachineRepresentation::kWord32:
         opcode = kMips64Sw;
         break;
+

[balazs.kilvady, 2016/07/13 08:21:28]

There are no newlines at other cases, please remove the above one.

[Marija Antic, 2016/07/13 08:32:37]

Done.

       case MachineRepresentation::kTagged:  // Fall through.
       case MachineRepresentation::kWord64:
         opcode = kMips64Sd;
         break;
       case MachineRepresentation::kSimd128:  // Fall through.
       case MachineRepresentation::kNone:
         UNREACHABLE();
         return;
     }
 
@@ skipping 51 matching lines @@
     uint32_t msb = base::bits::CountLeadingZeros32(~mask);
     if (shift != 0 && shift != 32 && msb + shift == 32) {
       // Insert zeros for (x >> K) << K => x & ~(2^K - 1) expression reduction
       // and remove constant loading of inverted mask.
       Emit(kMips64Ins, g.DefineSameAsFirst(node),
            g.UseRegister(m.left().node()), g.TempImmediate(0),
            g.TempImmediate(shift));
       return;
     }
   }
-  VisitBinop(this, node, kMips64And);
+  VisitBinop(this, node, kMips64And32);
 }
 
 
 void InstructionSelector::VisitWord64And(Node* node) {
   Mips64OperandGenerator g(this);
   Int64BinopMatcher m(node);
   if (m.left().IsWord64Shr() && CanCover(node, m.left().node()) &&
       m.right().HasValue()) {
     uint64_t mask = m.right().Value();
     uint32_t mask_width = base::bits::CountPopulation64(mask);
@@ skipping 35 matching lines @@
            g.UseRegister(m.left().node()), g.TempImmediate(0),
            g.TempImmediate(shift));
       return;
     }
   }
   VisitBinop(this, node, kMips64And);
 }
 
 
 void InstructionSelector::VisitWord32Or(Node* node) {
-  VisitBinop(this, node, kMips64Or);
+  VisitBinop(this, node, kMips64Or32);
 }
 
 
 void InstructionSelector::VisitWord64Or(Node* node) {
   VisitBinop(this, node, kMips64Or);
 }
 
 
 void InstructionSelector::VisitWord32Xor(Node* node) {
   Int32BinopMatcher m(node);
   if (m.left().IsWord32Or() && CanCover(node, m.left().node()) &&
       m.right().Is(-1)) {
     Int32BinopMatcher mleft(m.left().node());
     if (!mleft.right().HasValue()) {
       Mips64OperandGenerator g(this);
-      Emit(kMips64Nor, g.DefineAsRegister(node),
+      Emit(kMips64Nor32, g.DefineAsRegister(node),
            g.UseRegister(mleft.left().node()),
            g.UseRegister(mleft.right().node()));
       return;
     }
   }
   if (m.right().Is(-1)) {
     // Use Nor for bit negation and eliminate constant loading for xori.
     Mips64OperandGenerator g(this);
-    Emit(kMips64Nor, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
+    Emit(kMips64Nor32, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
          g.TempImmediate(0));
     return;
   }
-  VisitBinop(this, node, kMips64Xor);
+  VisitBinop(this, node, kMips64Xor32);
 }
 
 
 void InstructionSelector::VisitWord64Xor(Node* node) {
   Int64BinopMatcher m(node);
   if (m.left().IsWord64Or() && CanCover(node, m.left().node()) &&
       m.right().Is(-1)) {
     Int64BinopMatcher mleft(m.left().node());
     if (!mleft.right().HasValue()) {
       Mips64OperandGenerator g(this);
@@ skipping 1675 matching lines @@
   } else {
     DCHECK(kArchVariant == kMips64r2);
     return MachineOperatorBuilder::AlignmentRequirements::
         NoUnalignedAccessSupport();
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8