Cleanup interface descriptors to reflect that vectors are part of stores.

src/ic/s390/ic-s390.cc

Index: src/ic/s390/ic-s390.cc
diff --git a/src/ic/s390/ic-s390.cc b/src/ic/s390/ic-s390.cc
index 825499502fea7eda6013e41ba2742d6714b63b8b..6bb484a2fdf72550980582872835a2990e1efe91 100644
--- a/src/ic/s390/ic-s390.cc
+++ b/src/ic/s390/ic-s390.cc
@@ -439,8 +439,8 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) {
 static void StoreIC_PushArgs(MacroAssembler* masm) {
   __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
           StoreDescriptor::ValueRegister(),
-          VectorStoreICDescriptor::SlotRegister(),
-          VectorStoreICDescriptor::VectorRegister());
+          StoreWithVectorDescriptor::SlotRegister(),
+          StoreWithVectorDescriptor::VectorRegister());
 }
 
 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
@@ -658,8 +658,8 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm,
 
   // The handlers in the stub cache expect a vector and slot. Since we won't
   // change the IC from any downstream misses, a dummy vector can be used.
-  Register vector = VectorStoreICDescriptor::VectorRegister();
-  Register slot = VectorStoreICDescriptor::SlotRegister();
+  Register vector = StoreWithVectorDescriptor::VectorRegister();
+  Register slot = StoreWithVectorDescriptor::SlotRegister();
   DCHECK(!AreAliased(vector, slot, r7, r8, r9, ip));
   Handle<TypeFeedbackVector> dummy_vector =
       TypeFeedbackVector::DummyVector(masm->isolate());
@@ -731,8 +731,8 @@ void StoreIC::GenerateNormal(MacroAssembler* masm) {
   DCHECK(receiver.is(r3));
   DCHECK(name.is(r4));
   DCHECK(value.is(r2));
-  DCHECK(VectorStoreICDescriptor::VectorRegister().is(r5));
-  DCHECK(VectorStoreICDescriptor::SlotRegister().is(r6));
+  DCHECK(StoreWithVectorDescriptor::VectorRegister().is(r5));
+  DCHECK(StoreWithVectorDescriptor::SlotRegister().is(r6));
 
   __ LoadP(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));