Index: src/ic/mips/ic-mips.cc |
diff --git a/src/ic/mips/ic-mips.cc b/src/ic/mips/ic-mips.cc |
index d16b782a74413b67e6c3980b3e0846d44fcfbd8f..3a28b13bd8f76d4d78a09be938a25386bc294ccd 100644 |
--- a/src/ic/mips/ic-mips.cc |
+++ b/src/ic/mips/ic-mips.cc |
@@ -650,8 +650,8 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm, |
// The handlers in the stub cache expect a vector and slot. Since we won't |
// change the IC from any downstream misses, a dummy vector can be used. |
- Register vector = VectorStoreICDescriptor::VectorRegister(); |
- Register slot = VectorStoreICDescriptor::SlotRegister(); |
+ Register vector = StoreWithVectorDescriptor::VectorRegister(); |
+ Register slot = StoreWithVectorDescriptor::SlotRegister(); |
DCHECK(!AreAliased(vector, slot, t1, t2, t4, t5)); |
Handle<TypeFeedbackVector> dummy_vector = |
TypeFeedbackVector::DummyVector(masm->isolate()); |
@@ -712,8 +712,8 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm, |
static void StoreIC_PushArgs(MacroAssembler* masm) { |
__ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(), |
StoreDescriptor::ValueRegister(), |
- VectorStoreICDescriptor::SlotRegister(), |
- VectorStoreICDescriptor::VectorRegister()); |
+ StoreWithVectorDescriptor::SlotRegister(), |
+ StoreWithVectorDescriptor::VectorRegister()); |
} |
@@ -740,8 +740,8 @@ void StoreIC::GenerateNormal(MacroAssembler* masm) { |
DCHECK(receiver.is(a1)); |
DCHECK(name.is(a2)); |
DCHECK(value.is(a0)); |
- DCHECK(VectorStoreICDescriptor::VectorRegister().is(a3)); |
- DCHECK(VectorStoreICDescriptor::SlotRegister().is(t0)); |
+ DCHECK(StoreWithVectorDescriptor::VectorRegister().is(a3)); |
+ DCHECK(StoreWithVectorDescriptor::SlotRegister().is(t0)); |
__ lw(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset)); |