| Index: src/ic/mips/ic-mips.cc
|
| diff --git a/src/ic/mips/ic-mips.cc b/src/ic/mips/ic-mips.cc
|
| index d16b782a74413b67e6c3980b3e0846d44fcfbd8f..3a28b13bd8f76d4d78a09be938a25386bc294ccd 100644
|
| --- a/src/ic/mips/ic-mips.cc
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| +++ b/src/ic/mips/ic-mips.cc
|
| @@ -650,8 +650,8 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm,
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|
|
| // The handlers in the stub cache expect a vector and slot. Since we won't
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| // change the IC from any downstream misses, a dummy vector can be used.
|
| - Register vector = VectorStoreICDescriptor::VectorRegister();
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| - Register slot = VectorStoreICDescriptor::SlotRegister();
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| + Register vector = StoreWithVectorDescriptor::VectorRegister();
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| + Register slot = StoreWithVectorDescriptor::SlotRegister();
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| DCHECK(!AreAliased(vector, slot, t1, t2, t4, t5));
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| Handle<TypeFeedbackVector> dummy_vector =
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| TypeFeedbackVector::DummyVector(masm->isolate());
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| @@ -712,8 +712,8 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm,
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| static void StoreIC_PushArgs(MacroAssembler* masm) {
|
| __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
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| StoreDescriptor::ValueRegister(),
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| - VectorStoreICDescriptor::SlotRegister(),
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| - VectorStoreICDescriptor::VectorRegister());
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| + StoreWithVectorDescriptor::SlotRegister(),
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| + StoreWithVectorDescriptor::VectorRegister());
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| }
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|
|
|
|
| @@ -740,8 +740,8 @@ void StoreIC::GenerateNormal(MacroAssembler* masm) {
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| DCHECK(receiver.is(a1));
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| DCHECK(name.is(a2));
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| DCHECK(value.is(a0));
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| - DCHECK(VectorStoreICDescriptor::VectorRegister().is(a3));
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| - DCHECK(VectorStoreICDescriptor::SlotRegister().is(t0));
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| + DCHECK(StoreWithVectorDescriptor::VectorRegister().is(a3));
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| + DCHECK(StoreWithVectorDescriptor::SlotRegister().is(t0));
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|
|
| __ lw(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
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|