| OLD | NEW |
| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
| 6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/longjump.h" | 9 #include "vm/longjump.h" |
| 10 #include "vm/runtime_entry.h" | 10 #include "vm/runtime_entry.h" |
| (...skipping 842 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 853 void Assembler::LeaveStubFrame() { | 853 void Assembler::LeaveStubFrame() { |
| 854 LeaveDartFrame(); | 854 LeaveDartFrame(); |
| 855 } | 855 } |
| 856 | 856 |
| 857 | 857 |
| 858 void Assembler::LeaveStubFrameAndReturn(Register ra) { | 858 void Assembler::LeaveStubFrameAndReturn(Register ra) { |
| 859 LeaveDartFrameAndReturn(ra); | 859 LeaveDartFrameAndReturn(ra); |
| 860 } | 860 } |
| 861 | 861 |
| 862 | 862 |
| 863 #ifndef PRODUCT |
| 864 void Assembler::MaybeTraceAllocation(intptr_t cid, |
| 865 Register temp_reg, |
| 866 Label* trace) { |
| 867 ASSERT(cid > 0); |
| 868 ASSERT(!in_delay_slot_); |
| 869 ASSERT(temp_reg != kNoRegister); |
| 870 ASSERT(temp_reg != TMP); |
| 871 intptr_t state_offset = ClassTable::StateOffsetFor(cid); |
| 872 LoadIsolate(temp_reg); |
| 873 intptr_t table_offset = |
| 874 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); |
| 875 lw(temp_reg, Address(temp_reg, table_offset)); |
| 876 AddImmediate(temp_reg, state_offset); |
| 877 lw(temp_reg, Address(temp_reg, 0)); |
| 878 andi(CMPRES1, temp_reg, Immediate(ClassHeapStats::TraceAllocationMask())); |
| 879 bne(CMPRES1, ZR, trace); |
| 880 } |
| 881 |
| 882 |
| 863 void Assembler::UpdateAllocationStats(intptr_t cid, | 883 void Assembler::UpdateAllocationStats(intptr_t cid, |
| 864 Register temp_reg, | 884 Register temp_reg, |
| 865 Heap::Space space) { | 885 Heap::Space space) { |
| 866 ASSERT(!in_delay_slot_); | 886 ASSERT(!in_delay_slot_); |
| 867 ASSERT(temp_reg != kNoRegister); | 887 ASSERT(temp_reg != kNoRegister); |
| 868 ASSERT(temp_reg != TMP); | 888 ASSERT(temp_reg != TMP); |
| 869 ASSERT(cid > 0); | 889 ASSERT(cid > 0); |
| 870 intptr_t counter_offset = | 890 intptr_t counter_offset = |
| 871 ClassTable::CounterOffsetFor(cid, space == Heap::kNew); | 891 ClassTable::CounterOffsetFor(cid, space == Heap::kNew); |
| 872 LoadIsolate(temp_reg); | 892 LoadIsolate(temp_reg); |
| (...skipping 27 matching lines...) Expand all Loading... |
| 900 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); | 920 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); |
| 901 lw(temp_reg, Address(temp_reg, table_offset)); | 921 lw(temp_reg, Address(temp_reg, table_offset)); |
| 902 AddImmediate(temp_reg, class_offset); | 922 AddImmediate(temp_reg, class_offset); |
| 903 lw(TMP, Address(temp_reg, count_field_offset)); | 923 lw(TMP, Address(temp_reg, count_field_offset)); |
| 904 AddImmediate(TMP, 1); | 924 AddImmediate(TMP, 1); |
| 905 sw(TMP, Address(temp_reg, count_field_offset)); | 925 sw(TMP, Address(temp_reg, count_field_offset)); |
| 906 lw(TMP, Address(temp_reg, size_field_offset)); | 926 lw(TMP, Address(temp_reg, size_field_offset)); |
| 907 addu(TMP, TMP, size_reg); | 927 addu(TMP, TMP, size_reg); |
| 908 sw(TMP, Address(temp_reg, size_field_offset)); | 928 sw(TMP, Address(temp_reg, size_field_offset)); |
| 909 } | 929 } |
| 910 | 930 #endif // !PRODUCT |
| 911 | |
| 912 void Assembler::MaybeTraceAllocation(intptr_t cid, | |
| 913 Register temp_reg, | |
| 914 Label* trace) { | |
| 915 ASSERT(cid > 0); | |
| 916 ASSERT(!in_delay_slot_); | |
| 917 ASSERT(temp_reg != kNoRegister); | |
| 918 ASSERT(temp_reg != TMP); | |
| 919 intptr_t state_offset = ClassTable::StateOffsetFor(cid); | |
| 920 LoadIsolate(temp_reg); | |
| 921 intptr_t table_offset = | |
| 922 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); | |
| 923 lw(temp_reg, Address(temp_reg, table_offset)); | |
| 924 AddImmediate(temp_reg, state_offset); | |
| 925 lw(temp_reg, Address(temp_reg, 0)); | |
| 926 andi(CMPRES1, temp_reg, Immediate(ClassHeapStats::TraceAllocationMask())); | |
| 927 bne(CMPRES1, ZR, trace); | |
| 928 } | |
| 929 | 931 |
| 930 | 932 |
| 931 void Assembler::TryAllocate(const Class& cls, | 933 void Assembler::TryAllocate(const Class& cls, |
| 932 Label* failure, | 934 Label* failure, |
| 933 Register instance_reg, | 935 Register instance_reg, |
| 934 Register temp_reg) { | 936 Register temp_reg) { |
| 935 ASSERT(!in_delay_slot_); | 937 ASSERT(!in_delay_slot_); |
| 936 ASSERT(failure != NULL); | 938 ASSERT(failure != NULL); |
| 937 if (FLAG_inline_alloc) { | 939 if (FLAG_inline_alloc) { |
| 938 // If this allocation is traced, program will jump to failure path | 940 // If this allocation is traced, program will jump to failure path |
| (...skipping 324 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1263 Label stop; | 1265 Label stop; |
| 1264 b(&stop); | 1266 b(&stop); |
| 1265 Emit(reinterpret_cast<int32_t>(message)); | 1267 Emit(reinterpret_cast<int32_t>(message)); |
| 1266 Bind(&stop); | 1268 Bind(&stop); |
| 1267 break_(Instr::kStopMessageCode); | 1269 break_(Instr::kStopMessageCode); |
| 1268 } | 1270 } |
| 1269 | 1271 |
| 1270 } // namespace dart | 1272 } // namespace dart |
| 1271 | 1273 |
| 1272 #endif // defined TARGET_ARCH_MIPS | 1274 #endif // defined TARGET_ARCH_MIPS |
| OLD | NEW |