Chromium Code Reviews| Index: src/arm64/simulator-arm64.h |
| diff --git a/src/arm64/simulator-arm64.h b/src/arm64/simulator-arm64.h |
| index 9dd353a52a9bd8a93d3ac9cfb6fc1aba418873e6..5e91db6543dadb423aaf887b60598a0f9f94e437 100644 |
| --- a/src/arm64/simulator-arm64.h |
| +++ b/src/arm64/simulator-arm64.h |
| @@ -75,6 +75,13 @@ class SimulatorStack : public v8::internal::AllStatic { |
| #else // !defined(USE_SIMULATOR) |
| + |
| +template<typename T> |
| +struct make_unsigned { |
| + typedef T type; |
| +}; |
| + |
| + |
| enum ReverseByteMode { |
| Reverse16 = 0, |
| Reverse32 = 1, |
| @@ -136,35 +143,50 @@ class SimSystemRegister { |
| // Represent a register (r0-r31, v0-v31). |
| -template<int kSizeInBytes> |
| class SimRegisterBase { |
| public: |
| - template<typename T> |
| - void Set(T new_value, unsigned size = sizeof(T)) { |
| - ASSERT(size <= kSizeInBytes); |
| - ASSERT(size <= sizeof(new_value)); |
| + void Set(int64_t new_value, unsigned size) { |
| + ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits)); |
| // All AArch64 registers are zero-extending; Writing a W register clears the |
| // top bits of the corresponding X register. |
| - memset(value_, 0, kSizeInBytes); |
| - memcpy(value_, &new_value, size); |
| + value_ = new_value; |
|
Sven Panne
2014/05/16 11:15:47
A ternary is a bit more readable here:
value_ =
jbramley
2014/05/16 14:05:50
You probably need to set the value just once, to a
|
| + STATIC_ASSERT(kWRegSizeInBits == kSRegSizeInBits); |
| + if (size == kWRegSizeInBits) { |
| + value_ &= kWRegMask; |
| + } |
|
jbramley
2014/05/16 14:05:50
else {
ASSERT(size == (sizeof(value_) * kByteSiz
|
| + } |
| + |
| + template<typename T> |
| + void Set(T new_value) { |
|
Sven Panne
2014/05/16 11:15:47
This method and the corresponding templatized Get
jbramley
2014/05/16 14:05:50
Indeed; I'd like to see what you're aiming for. I
Fritz
2014/05/16 18:11:46
My direction is to only use the templatized Get/Se
|
| + value_ = 0; |
| + memcpy(&value_, &new_value, sizeof(T)); |
| } |
| // Copy 'size' bytes of the register to the result, and zero-extend to fill |
| // the result. |
| + int64_t Get(unsigned size) const { |
| + ASSERT(size/8 <= kXRegSize); |
| + int64_t result = value_; |
|
Sven Panne
2014/05/16 11:15:47
I think a ternary is more readable here, too:
|
| + if (size == kSRegSizeInBits) { |
|
jbramley
2014/05/16 14:05:50
Use of SRegSize is surprising here; use WRegSize i
|
| + result &= kSRegMask; |
| + } |
| + return result; |
| + } |
| + |
| template<typename T> |
| - T Get(unsigned size = sizeof(T)) const { |
| - ASSERT(size <= kSizeInBytes); |
| + T Get() const { |
| T result; |
| - memset(&result, 0, sizeof(result)); |
| - memcpy(&result, value_, size); |
| + memcpy(&result, &value_, sizeof(T)); |
| return result; |
| } |
| protected: |
| - uint8_t value_[kSizeInBytes]; |
| + int64_t value_; |
|
jbramley
2014/05/16 14:05:50
Have you thought about how NEON Q registers might
Fritz
2014/05/16 18:11:46
I don't have a fully formed solution yet. I do re
|
| }; |
| -typedef SimRegisterBase<kXRegSize> SimRegister; // r0-r31 |
| -typedef SimRegisterBase<kDRegSize> SimFPRegister; // v0-v31 |
| + |
| +STATIC_ASSERT(kXRegSize == kDRegSize); |
|
jbramley
2014/05/16 14:05:50
It'd be better to put this next to the declaration
|
| +typedef SimRegisterBase SimRegister; // r0-r31 |
| +typedef SimRegisterBase SimFPRegister; // v0-v31 |
| class Simulator : public DecoderVisitor { |
| @@ -331,33 +353,35 @@ class Simulator : public DecoderVisitor { |
| VISITOR_LIST(DECLARE) |
| #undef DECLARE |
| - // Register accessors. |
| + bool Reg31ZeroMode(unsigned code, Reg31Mode r31mode) const { |
|
jbramley
2014/05/16 14:05:50
`IsZeroRegister(...)` would be a better name.
Fritz
2014/05/16 18:11:46
Done.
|
| + return ((code == 31) && (r31mode == Reg31IsZeroRegister)); |
| + } |
| + // Register accessors. |
| // Return 'size' bits of the value of an integer register, as the specified |
| // type. The value is zero-extended to fill the result. |
| // |
| // The only supported values of 'size' are kXRegSizeInBits and |
| // kWRegSizeInBits. |
| - template<typename T> |
| - T reg(unsigned size, unsigned code, |
| + int64_t reg(unsigned size, unsigned code, |
| Reg31Mode r31mode = Reg31IsZeroRegister) const { |
| - unsigned size_in_bytes = size / 8; |
| - ASSERT(size_in_bytes <= sizeof(T)); |
| ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits)); |
| ASSERT(code < kNumberOfRegisters); |
| - if ((code == 31) && (r31mode == Reg31IsZeroRegister)) { |
| - T result; |
| - memset(&result, 0, sizeof(result)); |
| - return result; |
| + if (Reg31ZeroMode(code, r31mode)) { |
| + return 0; |
| } |
| - return registers_[code].Get<T>(size_in_bytes); |
| + return registers_[code].Get(size); |
| } |
| // Like reg(), but infer the access size from the template type. |
| template<typename T> |
| T reg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const { |
| - return reg<T>(sizeof(T) * 8, code, r31mode); |
| + ASSERT(code < kNumberOfRegisters); |
| + if (Reg31ZeroMode(code, r31mode)) { |
| + return 0; |
| + } |
| + return registers_[code].Get<T>(); |
| } |
| // Common specialized accessors for the reg() template. |
| @@ -371,11 +395,6 @@ class Simulator : public DecoderVisitor { |
| return reg<int64_t>(code, r31mode); |
| } |
| - int64_t reg(unsigned size, unsigned code, |
| - Reg31Mode r31mode = Reg31IsZeroRegister) const { |
| - return reg<int64_t>(size, code, r31mode); |
| - } |
| - |
| // Write 'size' bits of 'value' into an integer register. The value is |
| // zero-extended. This behaviour matches AArch64 register writes. |
| // |
| @@ -384,33 +403,31 @@ class Simulator : public DecoderVisitor { |
| template<typename T> |
| void set_reg(unsigned size, unsigned code, T value, |
| Reg31Mode r31mode = Reg31IsZeroRegister) { |
| - unsigned size_in_bytes = size / 8; |
| - ASSERT(size_in_bytes <= sizeof(T)); |
| ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits)); |
| ASSERT(code < kNumberOfRegisters); |
| - if ((code == 31) && (r31mode == Reg31IsZeroRegister)) { |
| - return; |
| - } |
| - return registers_[code].Set(value, size_in_bytes); |
| + if (!Reg31ZeroMode(code, r31mode)) |
| + registers_[code].Set(value, size); |
| } |
| // Like set_reg(), but infer the access size from the template type. |
| template<typename T> |
| void set_reg(unsigned code, T value, |
| Reg31Mode r31mode = Reg31IsZeroRegister) { |
| - set_reg(sizeof(value) * 8, code, value, r31mode); |
| + ASSERT(code < kNumberOfRegisters); |
| + if (!Reg31ZeroMode(code, r31mode)) |
| + registers_[code].Set(value); |
| } |
| // Common specialized accessors for the set_reg() template. |
| void set_wreg(unsigned code, int32_t value, |
| Reg31Mode r31mode = Reg31IsZeroRegister) { |
| - set_reg(kWRegSizeInBits, code, value, r31mode); |
| + set_reg(code, value, r31mode); |
| } |
| void set_xreg(unsigned code, int64_t value, |
| Reg31Mode r31mode = Reg31IsZeroRegister) { |
| - set_reg(kXRegSizeInBits, code, value, r31mode); |
| + set_reg(code, value, r31mode); |
| } |
| // Commonly-used special cases. |
| @@ -435,24 +452,10 @@ class Simulator : public DecoderVisitor { |
| Address get_sp() { return reg<Address>(31, Reg31IsStackPointer); } |
| - // Return 'size' bits of the value of a floating-point register, as the |
| - // specified type. The value is zero-extended to fill the result. |
| - // |
| - // The only supported values of 'size' are kDRegSizeInBits and |
| - // kSRegSizeInBits. |
| - template<typename T> |
| - T fpreg(unsigned size, unsigned code) const { |
| - unsigned size_in_bytes = size / 8; |
| - ASSERT(size_in_bytes <= sizeof(T)); |
| - ASSERT((size == kDRegSizeInBits) || (size == kSRegSizeInBits)); |
| - ASSERT(code < kNumberOfFPRegisters); |
| - return fpregisters_[code].Get<T>(size_in_bytes); |
| - } |
| - |
| - // Like fpreg(), but infer the access size from the template type. |
| template<typename T> |
| T fpreg(unsigned code) const { |
| - return fpreg<T>(sizeof(T) * 8, code); |
| + ASSERT(code < kNumberOfRegisters); |
| + return fpregisters_[code].Get<T>(); |
| } |
| // Common specialized accessors for the fpreg() template. |
| @@ -488,7 +491,7 @@ class Simulator : public DecoderVisitor { |
| void set_fpreg(unsigned code, T value) { |
| ASSERT((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize)); |
| ASSERT(code < kNumberOfFPRegisters); |
| - fpregisters_[code].Set(value, sizeof(value)); |
| + fpregisters_[code].Set(value); |
| } |
| // Common specialized accessors for the set_fpreg() template. |
| @@ -662,10 +665,15 @@ class Simulator : public DecoderVisitor { |
| void MemoryWrite64(uint8_t* address, uint64_t value); |
| void MemoryWriteFP64(uint8_t* address, double value); |
| - int64_t ShiftOperand(unsigned reg_size, |
| - int64_t value, |
| - Shift shift_type, |
| - unsigned amount); |
| + |
| + template <typename T> |
| + T ShiftOperand(T value, |
| + Shift shift_type, |
| + unsigned amount); |
| + |
| + template <typename T> |
| + void DataProcessing2Source(Instruction* instr); |
| + |
| int64_t Rotate(unsigned reg_width, |
| int64_t value, |
| Shift shift_type, |