Change arm64 simulator register backing store.

src/arm64/simulator-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_SIMULATOR_ARM64_H_
 #define V8_ARM64_SIMULATOR_ARM64_H_
 
 #include <stdarg.h>
 #include <vector>
 
@@ skipping 57 matching lines @@
 
   static uintptr_t RegisterCTryCatch(uintptr_t try_catch_address) {
     return try_catch_address;
   }
 
   static void UnregisterCTryCatch() { }
 };
 
 #else  // !defined(USE_SIMULATOR)
 
+
+template<typename T>
+struct make_unsigned {
+    typedef T type;
+};
+
+
 enum ReverseByteMode {
   Reverse16 = 0,
   Reverse32 = 1,
   Reverse64 = 2
 };
 
 
 // The proper way to initialize a simulated system register (such as NZCV) is as
 // follows:
 //  SimSystemRegister nzcv = SimSystemRegister::DefaultValueFor(NZCV);
@@ skipping 41 matching lines @@
   // describes the bits which are not modifiable.
   SimSystemRegister(uint32_t value, uint32_t write_ignore_mask)
       : value_(value), write_ignore_mask_(write_ignore_mask) { }
 
   uint32_t value_;
   uint32_t write_ignore_mask_;
 };
 
 
 // Represent a register (r0-r31, v0-v31).
-template<int kSizeInBytes>
 class SimRegisterBase {
  public:
-  template<typename T>
-  void Set(T new_value, unsigned size = sizeof(T)) {
-    ASSERT(size <= kSizeInBytes);
-    ASSERT(size <= sizeof(new_value));
+  void Set(int64_t new_value, unsigned size) {
+    ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits));
     // All AArch64 registers are zero-extending; Writing a W register clears the
     // top bits of the corresponding X register.
-    memset(value_, 0, kSizeInBytes);
-    memcpy(value_, &new_value, size);
+    value_ = new_value;

[Sven Panne, 2014/05/16 11:15:47]

A ternary is a bit more readable here:

  value_ = (size == kWRegSizeInBits) ? (new_value & kWRegMask) : new_value;

[jbramley, 2014/05/16 14:05:50]

You probably need to set the value just once, to avoid temporarily writing a
sign-extended value into 'value_'. (This kind of thing has upset the sampling
profiler in the past as registers occasionally appear to have unexpected
values.)

+    STATIC_ASSERT(kWRegSizeInBits == kSRegSizeInBits);
+    if (size == kWRegSizeInBits) {
+      value_ &= kWRegMask;
+    }

[jbramley, 2014/05/16 14:05:50]

else {
  ASSERT(size == (sizeof(value_) * kByteSize));
}

+  }
+
+  template<typename T>
+  void Set(T new_value) {

[Sven Panne, 2014/05/16 11:15:47]

This method and the corresponding templatized Get is temporary only, right? Or
is it the other way round? I don't fully understand the direction we're going
here...

[jbramley, 2014/05/16 14:05:50]

Indeed; I'd like to see what you're aiming for. I wouldn't expect this to be
temporary though; this method allows a constant size for memcpy, so it's
probably the best way to implement a simple 'put value X in a register' case.

[Fritz, 2014/05/16 18:11:46]

My direction is to only use the templatized Get/Set.  This results in a memcpy
with a constant length.

+    value_ = 0;
+    memcpy(&value_, &new_value, sizeof(T));
   }
 
   // Copy 'size' bytes of the register to the result, and zero-extend to fill
   // the result.
+  int64_t Get(unsigned size) const {
+    ASSERT(size/8 <= kXRegSize);
+    int64_t result = value_;

[Sven Panne, 2014/05/16 11:15:47]

I think a ternary is more readable here, too:

   return (size == kSRegSizeInBits) ? (value_ & kSRegMask) : value;

Furthermore, why do we use kSRegSizeInBits here and not kWRegSizeInBits (see
Set). Granted, they have to be the same, but we somehow should do things
consistently.

+    if (size == kSRegSizeInBits) {

[jbramley, 2014/05/16 14:05:50]

Use of SRegSize is surprising here; use WRegSize instead (as in the other
'Set').

+      result &= kSRegMask;
+    }
+    return result;
+  }
+
   template<typename T>
-  T Get(unsigned size = sizeof(T)) const {
-    ASSERT(size <= kSizeInBytes);
+  T Get() const {
     T result;
-    memset(&result, 0, sizeof(result));
-    memcpy(&result, value_, size);
+    memcpy(&result, &value_, sizeof(T));
     return result;
   }
 
  protected:
-  uint8_t value_[kSizeInBytes];
+  int64_t value_;

[jbramley, 2014/05/16 14:05:50]

Have you thought about how NEON Q registers might be represented? We discussed
it earlier in this issue but I don't think there was a conclusion.

[Fritz, 2014/05/16 18:11:46]

I don't have a fully formed solution yet.  I do realize that it will be
necessary to land this cl.

One thing I have considered is declaring all registers as 128 bit.  All access
to registers go through this class, there are no native operations on the
backing store.  So it will waste space.  64 registers * extra 8 bytes.  And it
doesn't exactly follow the hw model.

 };
-typedef SimRegisterBase<kXRegSize> SimRegister;      // r0-r31
-typedef SimRegisterBase<kDRegSize> SimFPRegister;    // v0-v31
+
+STATIC_ASSERT(kXRegSize == kDRegSize);

[jbramley, 2014/05/16 14:05:50]

It'd be better to put this next to the declaration of value_, but using sizeof:

STATIC_ASSERT(kXRegSize == sizeof(value_));
STATIC_ASSERT(kDRegSize == sizeof(value_));

+typedef SimRegisterBase SimRegister;      // r0-r31
+typedef SimRegisterBase SimFPRegister;    // v0-v31
 
 
 class Simulator : public DecoderVisitor {
  public:
   explicit Simulator(Decoder<DispatchingDecoderVisitor>* decoder,
                      Isolate* isolate = NULL,
                      FILE* stream = stderr);
   Simulator();
   ~Simulator();
 
@@ skipping 146 matching lines @@
     LogProcessorState();
     increment_pc();
     CheckBreakpoints();
   }
 
   // Declare all Visitor functions.
   #define DECLARE(A)  void Visit##A(Instruction* instr);
   VISITOR_LIST(DECLARE)
   #undef DECLARE
 
+  bool Reg31ZeroMode(unsigned code, Reg31Mode r31mode) const {

[jbramley, 2014/05/16 14:05:50]

`IsZeroRegister(...)` would be a better name.

[Fritz, 2014/05/16 18:11:46]

Done.

+    return ((code == 31) && (r31mode == Reg31IsZeroRegister));
+  }
+
   // Register accessors.
-
   // Return 'size' bits of the value of an integer register, as the specified
   // type. The value is zero-extended to fill the result.
   //
   // The only supported values of 'size' are kXRegSizeInBits and
   // kWRegSizeInBits.
-  template<typename T>
-  T reg(unsigned size, unsigned code,
+  int64_t reg(unsigned size, unsigned code,
         Reg31Mode r31mode = Reg31IsZeroRegister) const {
-    unsigned size_in_bytes = size / 8;
-    ASSERT(size_in_bytes <= sizeof(T));
     ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits));
     ASSERT(code < kNumberOfRegisters);
 
-    if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
-      T result;
-      memset(&result, 0, sizeof(result));
-      return result;
+    if (Reg31ZeroMode(code, r31mode)) {
+      return 0;
     }
-    return registers_[code].Get<T>(size_in_bytes);
+    return registers_[code].Get(size);
   }
 
   // Like reg(), but infer the access size from the template type.
   template<typename T>
   T reg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
-    return reg<T>(sizeof(T) * 8, code, r31mode);
+    ASSERT(code < kNumberOfRegisters);
+    if (Reg31ZeroMode(code, r31mode)) {
+      return 0;
+    }
+    return registers_[code].Get<T>();
   }
 
   // Common specialized accessors for the reg() template.
   int32_t wreg(unsigned code,
                Reg31Mode r31mode = Reg31IsZeroRegister) const {
     return reg<int32_t>(code, r31mode);
   }
 
   int64_t xreg(unsigned code,
                Reg31Mode r31mode = Reg31IsZeroRegister) const {
     return reg<int64_t>(code, r31mode);
   }
 
-  int64_t reg(unsigned size, unsigned code,
-              Reg31Mode r31mode = Reg31IsZeroRegister) const {
-    return reg<int64_t>(size, code, r31mode);
-  }
-
   // Write 'size' bits of 'value' into an integer register. The value is
   // zero-extended. This behaviour matches AArch64 register writes.
   //
   // The only supported values of 'size' are kXRegSizeInBits and
   // kWRegSizeInBits.
   template<typename T>
   void set_reg(unsigned size, unsigned code, T value,
                Reg31Mode r31mode = Reg31IsZeroRegister) {
-    unsigned size_in_bytes = size / 8;
-    ASSERT(size_in_bytes <= sizeof(T));
     ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits));
     ASSERT(code < kNumberOfRegisters);
 
-    if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
-      return;
-    }
-    return registers_[code].Set(value, size_in_bytes);
+    if (!Reg31ZeroMode(code, r31mode))
+      registers_[code].Set(value, size);
   }
 
   // Like set_reg(), but infer the access size from the template type.
   template<typename T>
   void set_reg(unsigned code, T value,
                Reg31Mode r31mode = Reg31IsZeroRegister) {
-    set_reg(sizeof(value) * 8, code, value, r31mode);
+    ASSERT(code < kNumberOfRegisters);
+    if (!Reg31ZeroMode(code, r31mode))
+      registers_[code].Set(value);
   }
 
   // Common specialized accessors for the set_reg() template.
   void set_wreg(unsigned code, int32_t value,
                 Reg31Mode r31mode = Reg31IsZeroRegister) {
-    set_reg(kWRegSizeInBits, code, value, r31mode);
+    set_reg(code, value, r31mode);
   }
 
   void set_xreg(unsigned code, int64_t value,
                 Reg31Mode r31mode = Reg31IsZeroRegister) {
-    set_reg(kXRegSizeInBits, code, value, r31mode);
+    set_reg(code, value, r31mode);
   }
 
   // Commonly-used special cases.
   template<typename T>
   void set_lr(T value) {
     ASSERT(sizeof(T) == kPointerSize);
     set_reg(kLinkRegCode, value);
   }
 
   template<typename T>
   void set_sp(T value) {
     ASSERT(sizeof(T) == kPointerSize);
     set_reg(31, value, Reg31IsStackPointer);
   }
 
   int64_t sp() { return xreg(31, Reg31IsStackPointer); }
   int64_t jssp() { return xreg(kJSSPCode, Reg31IsStackPointer); }
   int64_t fp() {
       return xreg(kFramePointerRegCode, Reg31IsStackPointer);
   }
   Instruction* lr() { return reg<Instruction*>(kLinkRegCode); }
 
   Address get_sp() { return reg<Address>(31, Reg31IsStackPointer); }
 
-  // Return 'size' bits of the value of a floating-point register, as the
-  // specified type. The value is zero-extended to fill the result.
-  //
-  // The only supported values of 'size' are kDRegSizeInBits and
-  // kSRegSizeInBits.
-  template<typename T>
-  T fpreg(unsigned size, unsigned code) const {
-    unsigned size_in_bytes = size / 8;
-    ASSERT(size_in_bytes <= sizeof(T));
-    ASSERT((size == kDRegSizeInBits) || (size == kSRegSizeInBits));
-    ASSERT(code < kNumberOfFPRegisters);
-    return fpregisters_[code].Get<T>(size_in_bytes);
-  }
-
-  // Like fpreg(), but infer the access size from the template type.
   template<typename T>
   T fpreg(unsigned code) const {
-    return fpreg<T>(sizeof(T) * 8, code);
+    ASSERT(code < kNumberOfRegisters);
+    return fpregisters_[code].Get<T>();
   }
 
   // Common specialized accessors for the fpreg() template.
   float sreg(unsigned code) const {
     return fpreg<float>(code);
   }
 
   uint32_t sreg_bits(unsigned code) const {
     return fpreg<uint32_t>(code);
   }
@@ skipping 15 matching lines @@
         return 0.0;
     }
   }
 
   // Write 'value' into a floating-point register. The value is zero-extended.
   // This behaviour matches AArch64 register writes.
   template<typename T>
   void set_fpreg(unsigned code, T value) {
     ASSERT((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
     ASSERT(code < kNumberOfFPRegisters);
-    fpregisters_[code].Set(value, sizeof(value));
+    fpregisters_[code].Set(value);
   }
 
   // Common specialized accessors for the set_fpreg() template.
   void set_sreg(unsigned code, float value) {
     set_fpreg(code, value);
   }
 
   void set_sreg_bits(unsigned code, uint32_t value) {
     set_fpreg(code, value);
   }
@@ skipping 153 matching lines @@
   float MemoryReadFP32(uint8_t* address);
   uint64_t MemoryRead64(uint8_t* address);
   double MemoryReadFP64(uint8_t* address);
 
   void MemoryWrite(uint8_t* address, uint64_t value, unsigned num_bytes);
   void MemoryWrite32(uint8_t* address, uint32_t value);
   void MemoryWriteFP32(uint8_t* address, float value);
   void MemoryWrite64(uint8_t* address, uint64_t value);
   void MemoryWriteFP64(uint8_t* address, double value);
 
-  int64_t ShiftOperand(unsigned reg_size,
-                       int64_t value,
-                       Shift shift_type,
-                       unsigned amount);
+
+  template <typename T>
+  T ShiftOperand(T value,
+                 Shift shift_type,
+                 unsigned amount);
+
+  template <typename T>
+  void DataProcessing2Source(Instruction* instr);
+
   int64_t Rotate(unsigned reg_width,
                  int64_t value,
                  Shift shift_type,
                  unsigned amount);
   int64_t ExtendValue(unsigned reg_width,
                       int64_t value,
                       Extend extend_type,
                       unsigned left_shift = 0);
 
   uint64_t ReverseBits(uint64_t value, unsigned num_bits);
@@ skipping 201 matching lines @@
   static void UnregisterCTryCatch() {
     Simulator::current(Isolate::Current())->PopAddress();
   }
 };
 
 #endif  // !defined(USE_SIMULATOR)
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM64_SIMULATOR_ARM64_H_