Change arm64 simulator register backing store.

src/arm64/simulator-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 141 matching lines @@
   // describes the bits which are not modifiable.
   SimSystemRegister(uint32_t value, uint32_t write_ignore_mask)
       : value_(value), write_ignore_mask_(write_ignore_mask) { }
 
   uint32_t value_;
   uint32_t write_ignore_mask_;
 };
 
 
 // Represent a register (r0-r31, v0-v31).
-template<int kSizeInBytes>
 class SimRegisterBase {
  public:
-  template<typename T>
-  void Set(T new_value, unsigned size = sizeof(T)) {
-    ASSERT(size <= kSizeInBytes);
-    ASSERT(size <= sizeof(new_value));
+  void Set(int64_t new_value, unsigned size) {
+    ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits));
     // All AArch64 registers are zero-extending; Writing a W register clears the
     // top bits of the corresponding X register.
-    memset(value_, 0, kSizeInBytes);
-    memcpy(value_, &new_value, size);
+    value_ = new_value;
+    STATIC_ASSERT(kWRegSizeInBits == kSRegSizeInBits);
+    if (size == kWRegSizeInBits) {
+      value_ &= kWRegMask;
+    }
+  }
+
+  template<typename T>
+  void Set(T new_value) {
+    union SetUnion {
+      int64_t value;
+      T new_value;
+    } reg = { 0 };
+    STATIC_ASSERT(sizeof(union SetUnion) == sizeof(value_));
+
+    reg.new_value = new_value;
+
+    value_ = reg.value;

[Sven Panne, 2014/03/28 07:57:55]

I am slightly worried about using the union trick here: This is undefined
behavior in C++ and we've actually seen compilers (clang IIRC) generating not
the code one wants here. v8 has the BitCast template for such tricks, but this
contains a memcpy for just that reason.

   }
 
   // Copy 'size' bytes of the register to the result, and zero-extend to fill
   // the result.
-  template<typename T>
-  T Get(unsigned size = sizeof(T)) const {
-    ASSERT(size <= kSizeInBytes);
-    T result;
-    memset(&result, 0, sizeof(result));
-    memcpy(&result, value_, size);
+  int64_t Get(unsigned size) const {
+    ASSERT(size/8 <= kXRegSize);
+    int64_t result = value_;
+    if (size == kSRegSizeInBits) {
+      result &= kSRegMask;
+    }
     return result;
   }
 
+  template<typename T>
+  T Get() const {
+    union GetUnion {
+      int64_t value;
+      T result;
+    } reg = { value_ };
+    STATIC_ASSERT(sizeof(union GetUnion) == sizeof(value_));
+
+    return reg.result;

[Sven Panne, 2014/03/28 07:57:55]

Same concern here as above: The compiler is free to elide the assignment of
value_ to reg.value, because according to the rules, reading reg.result can't
depend on that assignment.

+  }
+
  protected:
-  uint8_t value_[kSizeInBytes];
+  int64_t value_;
 };
-typedef SimRegisterBase<kXRegSize> SimRegister;      // r0-r31
-typedef SimRegisterBase<kDRegSize> SimFPRegister;    // v0-v31
+
+STATIC_ASSERT(kXRegSize == kDRegSize);
+typedef SimRegisterBase SimRegister;      // r0-r31
+typedef SimRegisterBase SimFPRegister;    // v0-v31
 
 
 class Simulator : public DecoderVisitor {
  public:
   explicit Simulator(Decoder<DispatchingDecoderVisitor>* decoder,
                      Isolate* isolate = NULL,
                      FILE* stream = stderr);
   Simulator();
   ~Simulator();
 
@@ skipping 146 matching lines @@
     LogProcessorState();
     increment_pc();
     CheckBreakpoints();
   }
 
   // Declare all Visitor functions.
   #define DECLARE(A)  void Visit##A(Instruction* instr);
   VISITOR_LIST(DECLARE)
   #undef DECLARE
 
+  bool Reg31ZeroMode(unsigned code, Reg31Mode r31mode) const {
+    return ((code == 31) && (r31mode == Reg31IsZeroRegister));
+  }
+
   // Register accessors.
-
   // Return 'size' bits of the value of an integer register, as the specified
   // type. The value is zero-extended to fill the result.
   //
   // The only supported values of 'size' are kXRegSizeInBits and
   // kWRegSizeInBits.
-  template<typename T>
-  T reg(unsigned size, unsigned code,
+  int64_t reg(unsigned size, unsigned code,
         Reg31Mode r31mode = Reg31IsZeroRegister) const {
-    unsigned size_in_bytes = size / 8;
-    ASSERT(size_in_bytes <= sizeof(T));
     ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits));
     ASSERT(code < kNumberOfRegisters);
 
-    if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
-      T result;
-      memset(&result, 0, sizeof(result));
-      return result;
+    if (Reg31ZeroMode(code, r31mode)) {
+      return 0;
     }
-    return registers_[code].Get<T>(size_in_bytes);
+    return registers_[code].Get(size);
   }
 
   // Like reg(), but infer the access size from the template type.
   template<typename T>
   T reg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
-    return reg<T>(sizeof(T) * 8, code, r31mode);
+    ASSERT(code < kNumberOfRegisters);
+    if (Reg31ZeroMode(code, r31mode)) {
+      return 0;
+    }
+    return registers_[code].Get<T>();
   }
 
   // Common specialized accessors for the reg() template.
   int32_t wreg(unsigned code,
                Reg31Mode r31mode = Reg31IsZeroRegister) const {
     return reg<int32_t>(code, r31mode);
   }
 
   int64_t xreg(unsigned code,
                Reg31Mode r31mode = Reg31IsZeroRegister) const {
     return reg<int64_t>(code, r31mode);
   }
 
-  int64_t reg(unsigned size, unsigned code,
-              Reg31Mode r31mode = Reg31IsZeroRegister) const {
-    return reg<int64_t>(size, code, r31mode);
-  }
-
   // Write 'size' bits of 'value' into an integer register. The value is
   // zero-extended. This behaviour matches AArch64 register writes.
   //
   // The only supported values of 'size' are kXRegSizeInBits and
   // kWRegSizeInBits.
   template<typename T>
   void set_reg(unsigned size, unsigned code, T value,
                Reg31Mode r31mode = Reg31IsZeroRegister) {
-    unsigned size_in_bytes = size / 8;
-    ASSERT(size_in_bytes <= sizeof(T));
     ASSERT((size == kXRegSizeInBits) || (size == kWRegSizeInBits));
     ASSERT(code < kNumberOfRegisters);
 
-    if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
-      return;
-    }
-    return registers_[code].Set(value, size_in_bytes);
+    if (!Reg31ZeroMode(code, r31mode))
+      registers_[code].Set(value, size);
   }
 
   // Like set_reg(), but infer the access size from the template type.
   template<typename T>
   void set_reg(unsigned code, T value,
                Reg31Mode r31mode = Reg31IsZeroRegister) {
-    set_reg(sizeof(value) * 8, code, value, r31mode);
+    ASSERT(code < kNumberOfRegisters);
+    if (!Reg31ZeroMode(code, r31mode))
+      registers_[code].Set(value);
   }
 
   // Common specialized accessors for the set_reg() template.
   void set_wreg(unsigned code, int32_t value,
                 Reg31Mode r31mode = Reg31IsZeroRegister) {
-    set_reg(kWRegSizeInBits, code, value, r31mode);
+    set_reg(code, value, r31mode);
   }
 
   void set_xreg(unsigned code, int64_t value,
                 Reg31Mode r31mode = Reg31IsZeroRegister) {
-    set_reg(kXRegSizeInBits, code, value, r31mode);
+    set_reg(code, value, r31mode);
   }
 
   // Commonly-used special cases.
   template<typename T>
   void set_lr(T value) {
     ASSERT(sizeof(T) == kPointerSize);
     set_reg(kLinkRegCode, value);
   }
 
   template<typename T>
   void set_sp(T value) {
     ASSERT(sizeof(T) == kPointerSize);
     set_reg(31, value, Reg31IsStackPointer);
   }
 
   int64_t sp() { return xreg(31, Reg31IsStackPointer); }
   int64_t jssp() { return xreg(kJSSPCode, Reg31IsStackPointer); }
   int64_t fp() {
       return xreg(kFramePointerRegCode, Reg31IsStackPointer);
   }
   Instruction* lr() { return reg<Instruction*>(kLinkRegCode); }
 
   Address get_sp() { return reg<Address>(31, Reg31IsStackPointer); }
 
-  // Return 'size' bits of the value of a floating-point register, as the
-  // specified type. The value is zero-extended to fill the result.
-  //
-  // The only supported values of 'size' are kDRegSizeInBits and
-  // kSRegSizeInBits.
-  template<typename T>
-  T fpreg(unsigned size, unsigned code) const {
-    unsigned size_in_bytes = size / 8;
-    ASSERT(size_in_bytes <= sizeof(T));
-    ASSERT((size == kDRegSizeInBits) || (size == kSRegSizeInBits));
-    ASSERT(code < kNumberOfFPRegisters);
-    return fpregisters_[code].Get<T>(size_in_bytes);
-  }
-
-  // Like fpreg(), but infer the access size from the template type.
   template<typename T>
   T fpreg(unsigned code) const {
-    return fpreg<T>(sizeof(T) * 8, code);
+    ASSERT(code < kNumberOfRegisters);
+    return fpregisters_[code].Get<T>();
   }
 
   // Common specialized accessors for the fpreg() template.
   float sreg(unsigned code) const {
     return fpreg<float>(code);
   }
 
   uint32_t sreg_bits(unsigned code) const {
     return fpreg<uint32_t>(code);
   }
@@ skipping 15 matching lines @@
         return 0.0;
     }
   }
 
   // Write 'value' into a floating-point register. The value is zero-extended.
   // This behaviour matches AArch64 register writes.
   template<typename T>
   void set_fpreg(unsigned code, T value) {
     ASSERT((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
     ASSERT(code < kNumberOfFPRegisters);
-    fpregisters_[code].Set(value, sizeof(value));
+    fpregisters_[code].Set(value);
   }
 
   // Common specialized accessors for the set_fpreg() template.
   void set_sreg(unsigned code, float value) {
     set_fpreg(code, value);
   }
 
   void set_sreg_bits(unsigned code, uint32_t value) {
     set_fpreg(code, value);
   }
@@ skipping 374 matching lines @@
   static void UnregisterCTryCatch() {
     Simulator::current(Isolate::Current())->PopAddress();
   }
 };
 
 #endif  // !defined(USE_SIMULATOR)
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM64_SIMULATOR_ARM64_H_