[Subzero][MIPS32] Implements variable alloca for MIPS32

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 831 matching lines @@
   uint32_t LocalsSlotsPaddingBytes = 0;
   alignStackSpillAreas(PreservedRegsSizeBytes, SpillAreaAlignmentBytes,
                        GlobalsSize, LocalsSlotsAlignmentBytes,
                        &SpillAreaPaddingBytes, &LocalsSlotsPaddingBytes);
   SpillAreaSizeBytes += SpillAreaPaddingBytes + LocalsSlotsPaddingBytes;
   uint32_t GlobalsAndSubsequentPaddingSize =
       GlobalsSize + LocalsSlotsPaddingBytes;
 
   // Adds the out args space to the stack, and align SP if necessary.
   TotalStackSizeBytes = PreservedRegsSizeBytes + SpillAreaSizeBytes +
-                        FixedAllocaSizeBytes + MaxOutArgsSizeBytes;
+                        FixedAllocaSizeBytes +
+                        (MaxOutArgsSizeBytes * (VariableAllocaUsed ? 0 : 1));
 
   // Generate "addiu sp, sp, -TotalStackSizeBytes"
   if (TotalStackSizeBytes) {
     // Use the scratch register if needed to legalize the immediate.
     Variable *SP = getPhysicalRegister(RegMIPS32::Reg_SP);
     _addiu(SP, SP, -(TotalStackSizeBytes));
   }
 
   Ctx->statsUpdateFrameBytes(TotalStackSizeBytes);
 
@@ skipping 255 matching lines @@
     // Constant size alloca.
     if (!UseFramePointer) {
       // If we don't need a Frame Pointer, this alloca has a known offset to the
       // stack pointer. We don't need adjust the stack pointer, nor assign any
       // value to Dest, as Dest is rematerializable.
       assert(Dest->isRematerializable());
       Context.insert<InstFakeDef>(Dest);
       return;
     }
   } else {
-    UnimplementedLoweringError(this, Instr);
+    // Non-constant sizes need to be adjusted to the next highest multiple of
+    // the required alignment at runtime.
+    VariableAllocaUsed = true;
+    Variable *AlignAmount;
+    auto *TotalSizeR = legalizeToReg(TotalSize, Legal_Reg);
+    auto *T1 = I32Reg();
+    auto *T2 = I32Reg();
+    auto *T3 = I32Reg();
+    auto *T4 = I32Reg();
+    auto *T5 = I32Reg();
+    _addiu(T1, TotalSizeR, MIPS32_STACK_ALIGNMENT_BYTES - 1);
+    _addiu(T2, getZero(), -MIPS32_STACK_ALIGNMENT_BYTES);
+    _and(T3, T1, T2);
+    _subu(T4, SP, T3);
+    if (Instr->getAlignInBytes()) {
+      AlignAmount =
+          legalizeToReg(Ctx->getConstantInt32(-AlignmentParam), Legal_Reg);
+      _and(T5, T4, AlignAmount);
+      _mov(Dest, T5);
+    } else {
+      _mov(Dest, T4);
+    }
+    _mov(SP, Dest);
     return;
   }
 
   // Add enough to the returned address to account for the out args area.
   if (MaxOutArgsSizeBytes > 0) {
     Variable *T = makeReg(getPointerType());
     _addiu(T, SP, MaxOutArgsSizeBytes);
     _mov(Dest, T);
   } else {
     _mov(Dest, SP);
@@ skipping 501 matching lines @@
   }
 
   // Generate a FakeUse of register arguments so that they do not get dead code
   // eliminated as a result of the FakeKill of scratch registers after the call.
   // These fake-uses need to be placed here to avoid argument registers from
   // being used during the legalizeToReg() calls above.
   for (auto *RegArg : RegArgs) {
     Context.insert<InstFakeUse>(RegArg);
   }
 
+  // If variable alloca is used the extra 16 bytes for argument build area
+  // will be allocated on stack before a call.
+  if (VariableAllocaUsed)
+    _addiu(SP, SP, -MaxOutArgsSizeBytes);
+
   Inst *NewCall = InstMIPS32Call::create(Func, ReturnReg, CallTarget);
   Context.insert(NewCall);
+
+  if (VariableAllocaUsed)
+    _addiu(SP, SP, MaxOutArgsSizeBytes);
+
+  // Insert a fake use of stack pointer to avoid dead code elimination of addiu
+  // instruction.
+  Context.insert<InstFakeUse>(SP);
+
   if (ReturnRegHi)
     Context.insert(InstFakeDef::create(Func, ReturnRegHi));
   // Insert a register-kill pseudo instruction.
   Context.insert(InstFakeKill::create(Func, NewCall));
   // Generate a FakeUse to keep the call live if necessary.
   if (Instr->hasSideEffects() && ReturnReg) {
     Context.insert<InstFakeUse>(ReturnReg);
   }
   if (Dest == nullptr)
     return;
@@ skipping 607 matching lines @@
         Reg = makeReg(Ty, RegNum);
       if (isInt<16>(int32_t(Value))) {
         Variable *Zero = getPhysicalRegister(RegMIPS32::Reg_ZERO, Ty);
         Context.insert<InstFakeDef>(Zero);
         _addiu(Reg, Zero, Value);
       } else {
         uint32_t UpperBits = (Value >> 16) & 0xFFFF;
         (void)UpperBits;
         uint32_t LowerBits = Value & 0xFFFF;
         Variable *TReg = makeReg(Ty, RegNum);
-        _lui(TReg, Ctx->getConstantInt32(UpperBits));
-        _ori(Reg, TReg, LowerBits);
+        if (LowerBits) {
+          _lui(TReg, Ctx->getConstantInt32(UpperBits));
+          _ori(Reg, TReg, LowerBits);
+        } else {
+          _lui(Reg, Ctx->getConstantInt32(UpperBits));
+        }
       }
       return Reg;
     } else if (isScalarFloatingType(Ty)) {
       // Load floats/doubles from literal pool.
       auto *CFrom = llvm::cast<Constant>(From);
       assert(CFrom->getShouldBePooled());
       Constant *Offset = Ctx->getConstantSym(0, CFrom->getLabelName());
       Variable *TReg1 = makeReg(getPointerType());
       Variable *TReg2 = makeReg(Ty);
       Context.insert<InstFakeDef>(TReg2);
@@ skipping 103 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice