Enables per-function far-branches for ARM and MIPS.

runtime/vm/assembler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
+#include "vm/longjump.h"
 #include "vm/runtime_entry.h"
 #include "vm/simulator.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 
 namespace dart {
 
 #if defined(USING_SIMULATOR)
 DECLARE_FLAG(bool, trace_sim);
 #endif
@@ skipping 22 matching lines @@
   }
 }
 
 
 static bool CanEncodeBranchOffset(int32_t offset) {
   ASSERT(Utils::IsAligned(offset, 4));
   return Utils::IsInt(18, offset);
 }
 
 
-static int32_t EncodeBranchOffset(int32_t offset, int32_t instr) {
-  ASSERT(Utils::IsAligned(offset, 4));
-  ASSERT(Utils::IsInt(18, offset));
+int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t instr) {
+  if (!CanEncodeBranchOffset(offset)) {
+    ASSERT(!use_far_branches());
+    const Error& error = Error::Handle(LanguageError::New(
+        String::Handle(String::New("Branch offset overflow"))));
+    Isolate::Current()->long_jump_base()->Jump(1, error);
+  }
 
   // Properly preserve only the bits supported in the instruction.
   offset >>= 2;
   offset &= kBranchOffsetMask;
   return (instr & ~kBranchOffsetMask) | offset;
 }
 
 
 static int DecodeBranchOffset(int32_t instr) {
   // Sign-extend, left-shift by 2.
@@ skipping 35 matching lines @@
       return;
     }
     // If the offset loading instructions aren't there, we must have replaced
     // the far branch with a near one, and so these instructions should be NOPs.
     ASSERT((high == Instr::kNopInstruction) && (low == Instr::kNopInstruction));
   }
 };
 
 
 void Assembler::EmitFarJump(int32_t offset, bool link) {
+  ASSERT(use_far_branches());
   const uint16_t low = Utils::Low16Bits(offset);
   const uint16_t high = Utils::High16Bits(offset);
   buffer_.EmitFixup(new PatchFarJump());
   lui(TMP, Immediate(high));
   ori(TMP, TMP, Immediate(low));
   if (link) {
     EmitRType(SPECIAL, TMP, R0, RA, 0, JALR);
   } else {
     EmitRType(SPECIAL, TMP, R0, R0, 0, JR);
   }
@@ skipping 53 matching lines @@
   nop();
   EmitFarJump(offset, false);
 }
 
 
 void Assembler::EmitBranch(Opcode b, Register rs, Register rt, Label* label) {
   if (label->IsBound()) {
     // Relative destination from an instruction after the branch.
     const int32_t dest =
         label->Position() - (buffer_.Size() + Instr::kInstrSize);
-    if (FLAG_use_far_branches && !CanEncodeBranchOffset(dest)) {
+    if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarBranch(b, rs, rt, label->Position());
     } else {
       const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       EmitIType(b, rs, rt, dest_off);
     }
   } else {
     const int position = buffer_.Size();
-    if (FLAG_use_far_branches) {
+    if (use_far_branches()) {
       const uint32_t dest_off = label->position_;
       EmitFarBranch(b, rs, rt, dest_off);
     } else {
       const uint16_t dest_off = EncodeBranchOffset(label->position_, 0);
       EmitIType(b, rs, rt, dest_off);
     }
     label->LinkTo(position);
   }
 }
 
 
 void Assembler::EmitRegImmBranch(RtRegImm b, Register rs, Label* label) {
   if (label->IsBound()) {
     // Relative destination from an instruction after the branch.
     const int32_t dest =
         label->Position() - (buffer_.Size() + Instr::kInstrSize);
-    if (FLAG_use_far_branches && !CanEncodeBranchOffset(dest)) {
+    if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarRegImmBranch(b, rs, label->Position());
     } else {
       const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       EmitRegImmType(REGIMM, rs, b, dest_off);
     }
   } else {
     const int position = buffer_.Size();
-    if (FLAG_use_far_branches) {
+    if (use_far_branches()) {
       const uint32_t dest_off = label->position_;
       EmitFarRegImmBranch(b, rs, dest_off);
     } else {
       const uint16_t dest_off = EncodeBranchOffset(label->position_, 0);
       EmitRegImmType(REGIMM, rs, b, dest_off);
     }
     label->LinkTo(position);
   }
 }
 
 
 void Assembler::EmitFpuBranch(bool kind, Label *label) {
   const int32_t b16 = kind ? (1 << 16) : 0;  // Bit 16 set for branch on true.
   if (label->IsBound()) {
     // Relative destination from an instruction after the branch.
     const int32_t dest =
         label->Position() - (buffer_.Size() + Instr::kInstrSize);
-    if (FLAG_use_far_branches && !CanEncodeBranchOffset(dest)) {
+    if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarFpuBranch(kind, label->Position());
     } else {
       const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       Emit(COP1 << kOpcodeShift |
            COP1_BC << kCop1SubShift |
            b16 |
            dest_off);
     }
   } else {
     const int position = buffer_.Size();
-    if (FLAG_use_far_branches) {
+    if (use_far_branches()) {
       const uint32_t dest_off = label->position_;
       EmitFarFpuBranch(kind, dest_off);
     } else {
       const uint16_t dest_off = EncodeBranchOffset(label->position_, 0);
       Emit(COP1 << kOpcodeShift |
            COP1_BC << kCop1SubShift |
            b16 |
            dest_off);
     }
     label->LinkTo(position);
@@ skipping 17 matching lines @@
 
 
 void Assembler::Bind(Label* label) {
   ASSERT(!label->IsBound());
   int bound_pc = buffer_.Size();
 
   while (label->IsLinked()) {
     int32_t position = label->Position();
     int32_t dest = bound_pc - (position + Instr::kInstrSize);
 
-    if (FLAG_use_far_branches && !CanEncodeBranchOffset(dest)) {
+    if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       // Far branches are enabled and we can't encode the branch offset.
 
       // Grab the branch instruction. We'll need to flip it later.
       const int32_t branch = buffer_.Load<int32_t>(position);
 
       // Grab instructions that load the offset.
       const int32_t high =
           buffer_.Load<int32_t>(position + 2 * Instr::kInstrSize);
       const int32_t low =
           buffer_.Load<int32_t>(position + 3 * Instr::kInstrSize);
 
       // Change from relative to the branch to relative to the assembler buffer.
       dest = buffer_.Size();
       const int32_t encoded_low =
           EncodeLoadImmediate(dest & kBranchOffsetMask, low);
       const int32_t encoded_high =
           EncodeLoadImmediate(dest >> 16, high);
 
       // Skip the unconditional far jump if the test fails by flipping the
       // sense of the branch instruction.
       buffer_.Store<int32_t>(position, FlipBranchInstruction(branch));
       buffer_.Store<int32_t>(position + 2 * Instr::kInstrSize, encoded_high);
       buffer_.Store<int32_t>(position + 3 * Instr::kInstrSize, encoded_low);
       label->position_ = DecodeLoadImmediate(low, high);
-    } else if (FLAG_use_far_branches && CanEncodeBranchOffset(dest)) {
+    } else if (use_far_branches() && CanEncodeBranchOffset(dest)) {
       // We assembled a far branch, but we don't need it. Replace with a near
       // branch.
 
       // Grab the link to the next branch.
       const int32_t high =
           buffer_.Load<int32_t>(position + 2 * Instr::kInstrSize);
       const int32_t low =
           buffer_.Load<int32_t>(position + 3 * Instr::kInstrSize);
 
       // Grab the original branch instruction.
@@ skipping 654 matching lines @@
     Bind(&msg);
     break_(Instr::kMsgMessageCode);
   }
 #endif
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS