Enables per-function far-branches for ARM and MIPS.

runtime/vm/assembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
+#include "vm/longjump.h"
+#include "vm/runtime_entry.h"
 #include "vm/simulator.h"
-#include "vm/runtime_entry.h"
 #include "vm/stack_frame.h"
 #include "vm/stub_code.h"
 
 // An extra check since we are assuming the existence of /proc/cpuinfo below.
 #if !defined(USING_SIMULATOR) && !defined(__linux__)
 #error ARM cross-compile only supported on Linux
 #endif
 
 namespace dart {
 
@@ skipping 1691 matching lines @@
 
 void Assembler::CompareClassId(Register object,
                                intptr_t class_id,
                                Register scratch) {
   LoadClassId(scratch, object);
   CompareImmediate(scratch, class_id);
 }
 
 
 static bool CanEncodeBranchOffset(int32_t offset) {
-  offset -= Instr::kPCReadOffset;
   ASSERT(Utils::IsAligned(offset, 4));
   return Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset);
 }
 
 
 int32_t Assembler::EncodeBranchOffset(int32_t offset, int32_t inst) {
   // The offset is off by 8 due to the way the ARM CPUs read PC.
   offset -= Instr::kPCReadOffset;
-  ASSERT(Utils::IsAligned(offset, 4));
-  ASSERT(Utils::IsInt(Utils::CountOneBits(kBranchOffsetMask), offset));
+
+  if (!CanEncodeBranchOffset(offset)) {
+    ASSERT(!use_far_branches());
+    const Error& error = Error::Handle(LanguageError::New(
+        String::Handle(String::New("Branch offset overflow"))));
+    Isolate::Current()->long_jump_base()->Jump(1, error);
+  }
 
   // Properly preserve only the bits supported in the instruction.
   offset >>= 2;
   offset &= kBranchOffsetMask;
   return (inst & ~kBranchOffsetMask) | offset;
 }
 
 
 int Assembler::DecodeBranchOffset(int32_t inst) {
   // Sign-extend, left-shift by 2, then add 8.
@@ skipping 54 matching lines @@
     blx(IP, cond);
   } else {
     bx(IP, cond);
   }
 }
 
 
 void Assembler::EmitBranch(Condition cond, Label* label, bool link) {
   if (label->IsBound()) {
     const int32_t dest = label->Position() - buffer_.Size();
-    if (FLAG_use_far_branches && !CanEncodeBranchOffset(dest)) {
+    if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       EmitFarBranch(cond, label->Position(), link);
     } else {
       EmitType5(cond, dest, link);
     }
   } else {
     const int position = buffer_.Size();
-    if (FLAG_use_far_branches) {
+    if (use_far_branches()) {
       const int32_t dest = label->position_;
       EmitFarBranch(cond, dest, link);
     } else {
       // Use the offset field of the branch instruction for linking the sites.
       EmitType5(cond, label->position_, link);
     }
     label->LinkTo(position);
   }
 }
 
 
 void Assembler::Bind(Label* label) {
   ASSERT(!label->IsBound());
   int bound_pc = buffer_.Size();
   while (label->IsLinked()) {
     const int32_t position = label->Position();
     int32_t dest = bound_pc - position;
-    if (FLAG_use_far_branches && !CanEncodeBranchOffset(dest)) {
+    if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
       // Far branches are enabled and we can't encode the branch offset.
 
       // Grab instructions that load the offset.
       const int32_t movw =
           buffer_.Load<int32_t>(position);
       const int32_t movt =
           buffer_.Load<int32_t>(position + 1 * Instr::kInstrSize);
 
       // Change from relative to the branch to relative to the assembler buffer.
       dest = buffer_.Size();
       const uint16_t dest_high = Utils::High16Bits(dest);
       const uint16_t dest_low = Utils::Low16Bits(dest);
       const int32_t patched_movt =
           0xe340c000 | ((dest_high >> 12) << 16) | (dest_high & 0xfff);
       const int32_t patched_movw =
           0xe300c000 | ((dest_low >> 12) << 16) | (dest_low & 0xfff);
 
       // Rewrite the instructions.
       buffer_.Store<int32_t>(position, patched_movw);
       buffer_.Store<int32_t>(position + 1 * Instr::kInstrSize, patched_movt);
       label->position_ = DecodeLoadImmediate(movt, movw);
-    } else if (FLAG_use_far_branches && CanEncodeBranchOffset(dest)) {
+    } else if (use_far_branches() && CanEncodeBranchOffset(dest)) {
       // Far branches are enabled, but we can encode the branch offset.
 
       // Grab instructions that load the offset, and the branch.
       const int32_t movw =
           buffer_.Load<int32_t>(position);
       const int32_t movt =
           buffer_.Load<int32_t>(position + 1 * Instr::kInstrSize);
       const int32_t branch =
           buffer_.Load<int32_t>(position + 2 * Instr::kInstrSize);
 
@@ skipping 860 matching lines @@
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
   return fpu_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM