src/mips/lithium-codegen-mips.h - Issue 21340002: Generate a custom OSR entrypoint for OSR compiles on all platforms, and transition to optimized cod…

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Unified Diff: src/mips/lithium-codegen-mips.h

Issue 21340002: Generate a custom OSR entrypoint for OSR compiles on all platforms, and transition to optimized cod… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge

Patch Set: Created 7 years, 5 months ago

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Index: src/mips/lithium-codegen-mips.h

diff --git a/src/mips/lithium-codegen-mips.h b/src/mips/lithium-codegen-mips.h

index a485b67db9496aed6e3c5dbc31e73dc5153d52cf..c6ad4be91f475364e07d7d3c0e45586cffbcd8c1 100644

--- a/src/mips/lithium-codegen-mips.h

+++ b/src/mips/lithium-codegen-mips.h

@@ -226,6 +226,8 @@ class LCodeGen BASE_EMBEDDED {

bool GenerateDeoptJumpTable();

bool GenerateSafepointTable();

+ void GenerateOsrPrologue();

enum SafepointMode {

RECORD_SIMPLE_SAFEPOINT,

RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS

« src/ia32/lithium-codegen-ia32.h ('K') | « src/mips/deoptimizer-mips.cc ('k') | src/mips/lithium-codegen-mips.cc » ('j') | src/objects.cc » ('J')