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Unified Diff: src/ia32/lithium-codegen-ia32.h

Issue 21340002: Generate a custom OSR entrypoint for OSR compiles on all platforms, and transition to optimized cod… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 5 months ago
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Index: src/ia32/lithium-codegen-ia32.h
diff --git a/src/ia32/lithium-codegen-ia32.h b/src/ia32/lithium-codegen-ia32.h
index 27295da8b80ddc8ac8d4373eaed02d17988d04ad..62b298256d9e4e2226c71af930bdb646e13cded1 100644
--- a/src/ia32/lithium-codegen-ia32.h
+++ b/src/ia32/lithium-codegen-ia32.h
@@ -225,6 +225,8 @@ class LCodeGen BASE_EMBEDDED {
bool GenerateJumpTable();
bool GenerateSafepointTable();
+ void GenerateOsrPrologue();
Michael Starzinger 2013/07/31 14:55:50 nit: Let's add a short one-liner comment about thi
+
enum SafepointMode {
RECORD_SIMPLE_SAFEPOINT,
RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS

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