Generate a custom OSR entrypoint for OSR compiles on all platforms, and transition to optimized cod…

src/ia32/lithium-codegen-ia32.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 215 matching lines @@
   void AddDeferredCode(LDeferredCode* code) { deferred_.Add(code, zone()); }
 
   // Code generation passes.  Returns true if code generation should
   // continue.
   bool GeneratePrologue();
   bool GenerateBody();
   bool GenerateDeferredCode();
   bool GenerateJumpTable();
   bool GenerateSafepointTable();
 
+  // Generates the custom OSR entrypoint and sets the osr_pc_offset.
+  void GenerateOsrPrologue();
+
   enum SafepointMode {
     RECORD_SIMPLE_SAFEPOINT,
     RECORD_SAFEPOINT_WITH_REGISTERS_AND_NO_ARGUMENTS
   };
 
   void CallCode(Handle<Code> code,
                 RelocInfo::Mode mode,
                 LInstruction* instr);
 
   void CallCodeGeneric(Handle<Code> code,
@@ skipping 316 matching lines @@
   Label exit_;
   Label* external_exit_;
   Label done_;
   int instruction_index_;
   LCodeGen::X87Stack x87_stack_;
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_IA32_LITHIUM_CODEGEN_IA32_H_