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Side by Side Diff: src/mips/lithium-codegen-mips.cc

Issue 21340002: Generate a custom OSR entrypoint for OSR compiles on all platforms, and transition to optimized cod… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 27
28 #include "v8.h" 28 #include "v8.h"
29 29
30 #include "mips/lithium-codegen-mips.h" 30 #include "mips/lithium-codegen-mips.h"
31 #include "mips/lithium-gap-resolver-mips.h" 31 #include "mips/lithium-gap-resolver-mips.h"
32 #include "code-stubs.h" 32 #include "code-stubs.h"
33 #include "stub-cache.h" 33 #include "stub-cache.h"
34 #include "hydrogen-osr.h"
34 35
35 namespace v8 { 36 namespace v8 {
36 namespace internal { 37 namespace internal {
37 38
38 39
39 class SafepointGenerator : public CallWrapper { 40 class SafepointGenerator : public CallWrapper {
40 public: 41 public:
41 SafepointGenerator(LCodeGen* codegen, 42 SafepointGenerator(LCodeGen* codegen,
42 LPointerMap* pointers, 43 LPointerMap* pointers,
43 Safepoint::DeoptMode mode) 44 Safepoint::DeoptMode mode)
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240 } 241 }
241 242
242 // Trace the call. 243 // Trace the call.
243 if (FLAG_trace && info()->IsOptimizing()) { 244 if (FLAG_trace && info()->IsOptimizing()) {
244 __ CallRuntime(Runtime::kTraceEnter, 0); 245 __ CallRuntime(Runtime::kTraceEnter, 0);
245 } 246 }
246 return !is_aborted(); 247 return !is_aborted();
247 } 248 }
248 249
249 250
251 void LCodeGen::GenerateOsrPrologue() {
252 // Generate the OSR entry prologue at the first unknown OSR value, or if there
253 // are none, at the OSR entrypoint instruction.
254 if (osr_pc_offset_ >= 0) return;
255
256 osr_pc_offset_ = masm()->pc_offset();
257
258 // Adjust the frame size, subsuming the unoptimized frame into the
259 // optimized frame.
260 int slots = GetStackSlotCount() - graph()->osr()->UnoptimizedFrameSlots();
261 ASSERT(slots >= 0);
262 __ Subu(sp, sp, Operand(slots * kPointerSize));
263 }
264
265
250 bool LCodeGen::GenerateBody() { 266 bool LCodeGen::GenerateBody() {
251 ASSERT(is_generating()); 267 ASSERT(is_generating());
252 bool emit_instructions = true; 268 bool emit_instructions = true;
253 for (current_instruction_ = 0; 269 for (current_instruction_ = 0;
254 !is_aborted() && current_instruction_ < instructions_->length(); 270 !is_aborted() && current_instruction_ < instructions_->length();
255 current_instruction_++) { 271 current_instruction_++) {
256 LInstruction* instr = instructions_->at(current_instruction_); 272 LInstruction* instr = instructions_->at(current_instruction_);
257 273
258 // Don't emit code for basic blocks with a replacement. 274 // Don't emit code for basic blocks with a replacement.
259 if (instr->IsLabel()) { 275 if (instr->IsLabel()) {
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1040 CallCode(stub.GetCode(isolate()), RelocInfo::CODE_TARGET, instr); 1056 CallCode(stub.GetCode(isolate()), RelocInfo::CODE_TARGET, instr);
1041 break; 1057 break;
1042 } 1058 }
1043 default: 1059 default:
1044 UNREACHABLE(); 1060 UNREACHABLE();
1045 } 1061 }
1046 } 1062 }
1047 1063
1048 1064
1049 void LCodeGen::DoUnknownOSRValue(LUnknownOSRValue* instr) { 1065 void LCodeGen::DoUnknownOSRValue(LUnknownOSRValue* instr) {
1050 // Record the address of the first unknown OSR value as the place to enter. 1066 GenerateOsrPrologue();
1051 if (osr_pc_offset_ == -1) osr_pc_offset_ = masm()->pc_offset();
1052 } 1067 }
1053 1068
1054 1069
1055 void LCodeGen::DoModI(LModI* instr) { 1070 void LCodeGen::DoModI(LModI* instr) {
1056 HMod* hmod = instr->hydrogen(); 1071 HMod* hmod = instr->hydrogen();
1057 HValue* left = hmod->left(); 1072 HValue* left = hmod->left();
1058 HValue* right = hmod->right(); 1073 HValue* right = hmod->right();
1059 if (hmod->HasPowerOf2Divisor()) { 1074 if (hmod->HasPowerOf2Divisor()) {
1060 const Register scratch = scratch0(); 1075 const Register scratch = scratch0();
1061 const Register left_reg = ToRegister(instr->left()); 1076 const Register left_reg = ToRegister(instr->left());
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5759 // This is a pseudo-instruction that ensures that the environment here is 5774 // This is a pseudo-instruction that ensures that the environment here is
5760 // properly registered for deoptimization and records the assembler's PC 5775 // properly registered for deoptimization and records the assembler's PC
5761 // offset. 5776 // offset.
5762 LEnvironment* environment = instr->environment(); 5777 LEnvironment* environment = instr->environment();
5763 5778
5764 // If the environment were already registered, we would have no way of 5779 // If the environment were already registered, we would have no way of
5765 // backpatching it with the spill slot operands. 5780 // backpatching it with the spill slot operands.
5766 ASSERT(!environment->HasBeenRegistered()); 5781 ASSERT(!environment->HasBeenRegistered());
5767 RegisterEnvironmentForDeoptimization(environment, Safepoint::kNoLazyDeopt); 5782 RegisterEnvironmentForDeoptimization(environment, Safepoint::kNoLazyDeopt);
5768 5783
5769 // Normally we record the first unknown OSR value as the entrypoint to the OSR 5784 GenerateOsrPrologue();
5770 // code, but if there were none, record the entrypoint here.
5771 if (osr_pc_offset_ == -1) osr_pc_offset_ = masm()->pc_offset();
5772 } 5785 }
5773 5786
5774 5787
5775 void LCodeGen::DoForInPrepareMap(LForInPrepareMap* instr) { 5788 void LCodeGen::DoForInPrepareMap(LForInPrepareMap* instr) {
5776 Register result = ToRegister(instr->result()); 5789 Register result = ToRegister(instr->result());
5777 Register object = ToRegister(instr->object()); 5790 Register object = ToRegister(instr->object());
5778 __ LoadRoot(at, Heap::kUndefinedValueRootIndex); 5791 __ LoadRoot(at, Heap::kUndefinedValueRootIndex);
5779 DeoptimizeIf(eq, instr->environment(), object, Operand(at)); 5792 DeoptimizeIf(eq, instr->environment(), object, Operand(at));
5780 5793
5781 Register null_value = t1; 5794 Register null_value = t1;
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5860 __ Subu(scratch, result, scratch); 5873 __ Subu(scratch, result, scratch);
5861 __ lw(result, FieldMemOperand(scratch, 5874 __ lw(result, FieldMemOperand(scratch,
5862 FixedArray::kHeaderSize - kPointerSize)); 5875 FixedArray::kHeaderSize - kPointerSize));
5863 __ bind(&done); 5876 __ bind(&done);
5864 } 5877 }
5865 5878
5866 5879
5867 #undef __ 5880 #undef __
5868 5881
5869 } } // namespace v8::internal 5882 } } // namespace v8::internal
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