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Side by Side Diff: src/ic/s390/stub-cache-s390.cc

Issue 2123983004: [ic] Split megamorphic stub cache in two caches (for loads and for stores). (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@flags-fix
Patch Set: Rebasing Created 4 years, 5 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_S390 5 #if V8_TARGET_ARCH_S390
6 6
7 #include "src/ic/stub-cache.h" 7 #include "src/ic/stub-cache.h"
8 #include "src/codegen.h" 8 #include "src/codegen.h"
9 #include "src/ic/ic.h" 9 #include "src/ic/ic.h"
10 #include "src/interface-descriptors.h" 10 #include "src/interface-descriptors.h"
11 11
12 namespace v8 { 12 namespace v8 {
13 namespace internal { 13 namespace internal {
14 14
15 #define __ ACCESS_MASM(masm) 15 #define __ ACCESS_MASM(masm)
16 16
17 static void ProbeTable(Isolate* isolate, MacroAssembler* masm, 17 static void ProbeTable(StubCache* stub_cache, MacroAssembler* masm,
18 Code::Flags flags, StubCache::Table table, 18 Code::Flags flags, StubCache::Table table,
19 Register receiver, Register name, 19 Register receiver, Register name,
20 // Number of the cache entry, not scaled. 20 // Number of the cache entry, not scaled.
21 Register offset, Register scratch, Register scratch2, 21 Register offset, Register scratch, Register scratch2,
22 Register offset_scratch) { 22 Register offset_scratch) {
23 ExternalReference key_offset(isolate->stub_cache()->key_reference(table)); 23 ExternalReference key_offset(stub_cache->key_reference(table));
24 ExternalReference value_offset(isolate->stub_cache()->value_reference(table)); 24 ExternalReference value_offset(stub_cache->value_reference(table));
25 ExternalReference map_offset(isolate->stub_cache()->map_reference(table)); 25 ExternalReference map_offset(stub_cache->map_reference(table));
26 26
27 uintptr_t key_off_addr = reinterpret_cast<uintptr_t>(key_offset.address()); 27 uintptr_t key_off_addr = reinterpret_cast<uintptr_t>(key_offset.address());
28 uintptr_t value_off_addr = 28 uintptr_t value_off_addr =
29 reinterpret_cast<uintptr_t>(value_offset.address()); 29 reinterpret_cast<uintptr_t>(value_offset.address());
30 uintptr_t map_off_addr = reinterpret_cast<uintptr_t>(map_offset.address()); 30 uintptr_t map_off_addr = reinterpret_cast<uintptr_t>(map_offset.address());
31 31
32 // Check the relative positions of the address fields. 32 // Check the relative positions of the address fields.
33 DCHECK(value_off_addr > key_off_addr); 33 DCHECK(value_off_addr > key_off_addr);
34 DCHECK((value_off_addr - key_off_addr) % 4 == 0); 34 DCHECK((value_off_addr - key_off_addr) % 4 == 0);
35 DCHECK((value_off_addr - key_off_addr) < (256 * 4)); 35 DCHECK((value_off_addr - key_off_addr) < (256 * 4));
(...skipping 54 matching lines...) Expand 10 before | Expand all | Expand 10 after
90 90
91 // Jump to the first instruction in the code stub. 91 // Jump to the first instruction in the code stub.
92 // TODO(joransiu): Combine into indirect branch 92 // TODO(joransiu): Combine into indirect branch
93 __ la(code, MemOperand(code, Code::kHeaderSize - kHeapObjectTag)); 93 __ la(code, MemOperand(code, Code::kHeaderSize - kHeapObjectTag));
94 __ b(code); 94 __ b(code);
95 95
96 // Miss: fall through. 96 // Miss: fall through.
97 __ bind(&miss); 97 __ bind(&miss);
98 } 98 }
99 99
100 void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind, 100 void StubCache::GenerateProbe(MacroAssembler* masm, Register receiver,
101 Code::Flags flags, Register receiver,
102 Register name, Register scratch, Register extra, 101 Register name, Register scratch, Register extra,
103 Register extra2, Register extra3) { 102 Register extra2, Register extra3) {
104 Isolate* isolate = masm->isolate(); 103 Code::Flags flags =
104 Code::RemoveHolderFromFlags(Code::ComputeHandlerFlags(ic_kind_));
105
105 Label miss; 106 Label miss;
106 107
107 #if V8_TARGET_ARCH_S390X 108 #if V8_TARGET_ARCH_S390X
108 // Make sure that code is valid. The multiplying code relies on the 109 // Make sure that code is valid. The multiplying code relies on the
109 // entry size being 24. 110 // entry size being 24.
110 DCHECK(sizeof(Entry) == 24); 111 DCHECK(sizeof(Entry) == 24);
111 #else 112 #else
112 // Make sure that code is valid. The multiplying code relies on the 113 // Make sure that code is valid. The multiplying code relies on the
113 // entry size being 12. 114 // entry size being 12.
114 DCHECK(sizeof(Entry) == 12); 115 DCHECK(sizeof(Entry) == 12);
115 #endif 116 #endif
116 117
117 // Make sure that there are no register conflicts. 118 // Make sure that there are no register conflicts.
118 DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3)); 119 DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3));
119 120
120 // Check scratch, extra and extra2 registers are valid. 121 // Check scratch, extra and extra2 registers are valid.
121 DCHECK(!scratch.is(no_reg)); 122 DCHECK(!scratch.is(no_reg));
122 DCHECK(!extra.is(no_reg)); 123 DCHECK(!extra.is(no_reg));
123 DCHECK(!extra2.is(no_reg)); 124 DCHECK(!extra2.is(no_reg));
124 DCHECK(!extra3.is(no_reg)); 125 DCHECK(!extra3.is(no_reg));
125 126
126 #ifdef DEBUG 127 #ifdef DEBUG
127 // If vector-based ics are in use, ensure that scratch, extra, extra2 and 128 // If vector-based ics are in use, ensure that scratch, extra, extra2 and
128 // extra3 don't conflict with the vector and slot registers, which need 129 // extra3 don't conflict with the vector and slot registers, which need
129 // to be preserved for a handler call or miss. 130 // to be preserved for a handler call or miss.
130 if (IC::ICUseVector(ic_kind)) { 131 if (IC::ICUseVector(ic_kind_)) {
131 Register vector, slot; 132 Register vector, slot;
132 if (ic_kind == Code::STORE_IC || ic_kind == Code::KEYED_STORE_IC) { 133 if (ic_kind_ == Code::STORE_IC || ic_kind_ == Code::KEYED_STORE_IC) {
133 vector = VectorStoreICDescriptor::VectorRegister(); 134 vector = VectorStoreICDescriptor::VectorRegister();
134 slot = VectorStoreICDescriptor::SlotRegister(); 135 slot = VectorStoreICDescriptor::SlotRegister();
135 } else { 136 } else {
137 DCHECK(ic_kind_ == Code::LOAD_IC || ic_kind_ == Code::KEYED_LOAD_IC);
136 vector = LoadWithVectorDescriptor::VectorRegister(); 138 vector = LoadWithVectorDescriptor::VectorRegister();
137 slot = LoadWithVectorDescriptor::SlotRegister(); 139 slot = LoadWithVectorDescriptor::SlotRegister();
138 } 140 }
139 DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3)); 141 DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3));
140 } 142 }
141 #endif 143 #endif
142 144
143 Counters* counters = masm->isolate()->counters(); 145 Counters* counters = masm->isolate()->counters();
144 __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2, 146 __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2,
145 extra3); 147 extra3);
146 148
147 // Check that the receiver isn't a smi. 149 // Check that the receiver isn't a smi.
148 __ JumpIfSmi(receiver, &miss); 150 __ JumpIfSmi(receiver, &miss);
149 151
150 // Get the map of the receiver and compute the hash. 152 // Get the map of the receiver and compute the hash.
151 __ LoadlW(scratch, FieldMemOperand(name, Name::kHashFieldOffset)); 153 __ LoadlW(scratch, FieldMemOperand(name, Name::kHashFieldOffset));
152 __ LoadP(ip, FieldMemOperand(receiver, HeapObject::kMapOffset)); 154 __ LoadP(ip, FieldMemOperand(receiver, HeapObject::kMapOffset));
153 __ AddP(scratch, scratch, ip); 155 __ AddP(scratch, scratch, ip);
154 __ XorP(scratch, scratch, Operand(flags)); 156 __ XorP(scratch, scratch, Operand(flags));
155 // The mask omits the last two bits because they are not part of the hash. 157 // The mask omits the last two bits because they are not part of the hash.
156 __ AndP(scratch, scratch, 158 __ AndP(scratch, scratch,
157 Operand((kPrimaryTableSize - 1) << kCacheIndexShift)); 159 Operand((kPrimaryTableSize - 1) << kCacheIndexShift));
158 160
159 // Probe the primary table. 161 // Probe the primary table.
160 ProbeTable(isolate, masm, flags, kPrimary, receiver, name, scratch, extra, 162 ProbeTable(this, masm, flags, kPrimary, receiver, name, scratch, extra,
161 extra2, extra3); 163 extra2, extra3);
162 164
163 // Primary miss: Compute hash for secondary probe. 165 // Primary miss: Compute hash for secondary probe.
164 __ SubP(scratch, scratch, name); 166 __ SubP(scratch, scratch, name);
165 __ AddP(scratch, scratch, Operand(flags)); 167 __ AddP(scratch, scratch, Operand(flags));
166 __ AndP(scratch, scratch, 168 __ AndP(scratch, scratch,
167 Operand((kSecondaryTableSize - 1) << kCacheIndexShift)); 169 Operand((kSecondaryTableSize - 1) << kCacheIndexShift));
168 170
169 // Probe the secondary table. 171 // Probe the secondary table.
170 ProbeTable(isolate, masm, flags, kSecondary, receiver, name, scratch, extra, 172 ProbeTable(this, masm, flags, kSecondary, receiver, name, scratch, extra,
171 extra2, extra3); 173 extra2, extra3);
172 174
173 // Cache miss: Fall-through and let caller handle the miss by 175 // Cache miss: Fall-through and let caller handle the miss by
174 // entering the runtime system. 176 // entering the runtime system.
175 __ bind(&miss); 177 __ bind(&miss);
176 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2, 178 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2,
177 extra3); 179 extra3);
178 } 180 }
179 181
180 #undef __ 182 #undef __
181 } // namespace internal 183 } // namespace internal
182 } // namespace v8 184 } // namespace v8
183 185
184 #endif // V8_TARGET_ARCH_S390 186 #endif // V8_TARGET_ARCH_S390
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