SubZero: legalize for f32/f64 constants in MIPS32

src/IceInstMIPS32.h

 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-===    //
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 10 matching lines @@
 
 #include "IceConditionCodesMIPS32.h"
 #include "IceDefs.h"
 #include "IceInst.h"
 #include "IceInstMIPS32.def"
 #include "IceOperand.h"
 
 namespace Ice {
 namespace MIPS32 {
 
+enum RelocOp { RO_No, RO_Hi, RO_Lo };
+
+inline void emitRelocOp(Ostream &Str, RelocOp Reloc) {
+  switch (Reloc) {
+  case RO_No:
+    break;
+  case RO_Hi:
+    Str << "%hi";
+    break;
+  case RO_Lo:
+    Str << "%lo";
+    break;
+  }
+}
+
 class TargetMIPS32;
 
 /// OperandMips32 extends the Operand hierarchy.
 //
 class OperandMIPS32 : public Operand {
   OperandMIPS32() = delete;
   OperandMIPS32(const OperandMIPS32 &) = delete;
   OperandMIPS32 &operator=(const OperandMIPS32 &) = delete;
 
 public:
@@ skipping 24 matching lines @@
   // TODO(jvoung): unify with the assembler.
   enum AddrMode { Offset };
 
   /// NOTE: The Variable-typed operands have to be registers.
   ///
   /// Reg + Imm. The Immediate actually has a limited number of bits
   /// for encoding, so check canHoldOffset first. It cannot handle
   /// general Constant operands like ConstantRelocatable, since a relocatable
   /// can potentially take up too many bits.
   static OperandMIPS32Mem *create(Cfg *Func, Type Ty, Variable *Base,
-                                  ConstantInteger32 *ImmOffset,
-                                  AddrMode Mode = Offset) {
+                                  Operand *ImmOffset, AddrMode Mode = Offset) {
     return new (Func->allocate<OperandMIPS32Mem>())
         OperandMIPS32Mem(Func, Ty, Base, ImmOffset, Mode);
   }
 
   Variable *getBase() const { return Base; }
-  ConstantInteger32 *getOffset() const { return ImmOffset; }
+  Operand *getOffset() const { return ImmOffset; }
   AddrMode getAddrMode() const { return Mode; }
 
   void emit(const Cfg *Func) const override;
   using OperandMIPS32::dump;
 
   static bool classof(const Operand *Operand) {
     return Operand->getKind() == static_cast<OperandKind>(kMem);
   }
 
   /// Return true if a load/store instruction for an element of type Ty
   /// can encode the Offset directly in the immediate field of the 32-bit
   /// MIPS instruction. For some types, if the load is Sign extending, then
   /// the range is reduced.
   static bool canHoldOffset(Type Ty, bool SignExt, int32_t Offset);
 
   void dump(const Cfg *Func, Ostream &Str) const override {
     (void)Func;
     (void)Str;
   }
 
 private:
-  OperandMIPS32Mem(Cfg *Func, Type Ty, Variable *Base,
-                   ConstantInteger32 *ImmOffset, AddrMode Mode);
+  OperandMIPS32Mem(Cfg *Func, Type Ty, Variable *Base, Operand *ImmOffset,
+                   AddrMode Mode);
 
   Variable *Base;
-  ConstantInteger32 *ImmOffset;
-  AddrMode Mode;
+  Operand *const ImmOffset;
+  const AddrMode Mode;
 };
 
 /// Base class for Mips instructions.
 class InstMIPS32 : public InstTarget {
   InstMIPS32() = delete;
   InstMIPS32(const InstMIPS32 &) = delete;
   InstMIPS32 &operator=(const InstMIPS32 &) = delete;
 
 public:
   enum InstKindMIPS32 {
@@ skipping 127 matching lines @@
 };
 
 /// Instructions of the form x := op(y).
 template <InstMIPS32::InstKindMIPS32 K>
 class InstMIPS32UnaryopGPR : public InstMIPS32 {
   InstMIPS32UnaryopGPR() = delete;
   InstMIPS32UnaryopGPR(const InstMIPS32UnaryopGPR &) = delete;
   InstMIPS32UnaryopGPR &operator=(const InstMIPS32UnaryopGPR &) = delete;
 
 public:
-  static InstMIPS32UnaryopGPR *create(Cfg *Func, Variable *Dest, Operand *Src) {
+  static InstMIPS32UnaryopGPR *create(Cfg *Func, Variable *Dest, Operand *Src,
+                                      RelocOp Reloc = RO_No) {
     return new (Func->allocate<InstMIPS32UnaryopGPR>())
-        InstMIPS32UnaryopGPR(Func, Dest, Src);
+        InstMIPS32UnaryopGPR(Func, Dest, Src, Reloc);
   }
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     emitUnaryopGPR(Opcode, this, Func);
   }
   void emitIAS(const Cfg *Func) const override {
     (void)Func;
     llvm_unreachable("Not yet implemented");
   }
   void dump(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrDump();
     dumpOpcode(Str, Opcode, getDest()->getType());
     Str << " ";
     dumpDest(Func);
     Str << ", ";
     dumpSources(Func);
   }
   static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
 
 protected:
-  InstMIPS32UnaryopGPR(Cfg *Func, Variable *Dest, Operand *Src)
-      : InstMIPS32(Func, K, 1, Dest) {
+  InstMIPS32UnaryopGPR(Cfg *Func, Variable *Dest, Operand *Src,
+                       RelocOp Reloc = RO_No)
+      : InstMIPS32(Func, K, 1, Dest), Reloc(Reloc) {
     addSource(Src);
   }
 
 private:
   static const char *Opcode;
+  const RelocOp Reloc;
 };
 
 /// Instructions of the form opcode reg, reg.
 template <InstMIPS32::InstKindMIPS32 K>
 class InstMIPS32TwoAddrFPR : public InstMIPS32 {
   InstMIPS32TwoAddrFPR() = delete;
   InstMIPS32TwoAddrFPR(const InstMIPS32TwoAddrFPR &) = delete;
   InstMIPS32TwoAddrFPR &operator=(const InstMIPS32TwoAddrFPR &) = delete;
 
 public:
@@ skipping 178 matching lines @@
 // InstMIPS32Memory represents instructions which loads/stores data on memory
 // Its format is "OPCODE GPR, OFFSET(BASE GPR)"
 template <InstMIPS32::InstKindMIPS32 K>
 class InstMIPS32Memory : public InstMIPS32 {
   InstMIPS32Memory() = delete;
   InstMIPS32Memory(const InstMIPS32Memory &) = delete;
   InstMIPS32Memory &operator=(const InstMIPS32Memory &) = delete;
 
 public:
   static InstMIPS32Memory *create(Cfg *Func, Variable *Value,
-                                  OperandMIPS32Mem *Mem) {
+                                  OperandMIPS32Mem *Mem,
+                                  RelocOp Reloc = RO_No) {
     return new (Func->allocate<InstMIPS32Memory>())
-        InstMIPS32Memory(Func, Value, Mem);
+        InstMIPS32Memory(Func, Value, Mem, Reloc);
   }
 
   void emit(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrEmit();
     assert(getSrcSize() == 2);
     Str << "\t" << Opcode << "\t";
     getSrc(0)->emit(Func);
     Str << ", ";
+    emitRelocOp(Str, Reloc);
+    Str << (Reloc ? "(" : "");
     getSrc(1)->emit(Func);
+    Str << (Reloc ? ")" : "");
   }
 
   void emitIAS(const Cfg *Func) const override {
     (void)Func;
     llvm_unreachable("Not yet implemented");
   }
 
   void dump(const Cfg *Func) const override {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Func->getContext()->getStrDump();
     Str << "\t" << Opcode << "\t";
-    Str << " ";
+    getSrc(0)->dump(Func);
+    Str << ", ";
+    emitRelocOp(Str, Reloc);
+    Str << (Reloc ? "(" : "");
     getSrc(1)->dump(Func);
-    Str << ", ";
-    getSrc(0)->dump(Func);
+    Str << (Reloc ? ")" : "");
   }
   static bool classof(const Inst *Inst) { return isClassof(Inst, K); }
 
 private:
-  InstMIPS32Memory(Cfg *Func, Variable *Value, OperandMIPS32Mem *Mem)
-      : InstMIPS32(Func, K, 2, nullptr) {
+  InstMIPS32Memory(Cfg *Func, Variable *Value, OperandMIPS32Mem *Mem,
+                   RelocOp Reloc = RO_No)
+      : InstMIPS32(Func, K, 2, nullptr), Reloc(Reloc) {
     addSource(Value);
     addSource(Mem);
   }
   static const char *Opcode;
+  const RelocOp Reloc;
 };
 
 // InstMIPS32Label represents an intra-block label that is the target of an
 // intra-block branch. The offset between the label and the branch must be fit
 // in the instruction immediate (considered "near").
 class InstMIPS32Label : public InstMIPS32 {
   InstMIPS32Label() = delete;
   InstMIPS32Label(const InstMIPS32Label &) = delete;
   InstMIPS32Label &operator=(const InstMIPS32Label &) = delete;
 
@@ skipping 190 matching lines @@
 using InstMIPS32Cvt_d_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_d_w>;
 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>;
 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>;
 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>;
 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>;
 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>;
 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>;
 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>;
 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
 using InstMIPS32Ldc1 = InstMIPS32Memory<InstMIPS32::Ldc1>;
-using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>;
+using InstMIPS32Lui = InstMIPS32UnaryopGPR<InstMIPS32::Lui>;
 using InstMIPS32Lw = InstMIPS32Memory<InstMIPS32::Lw>;
 using InstMIPS32Lwc1 = InstMIPS32Memory<InstMIPS32::Lwc1>;
 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
@@ skipping 71 matching lines @@
 // Declare partial template specializations of emit() methods that already have
 // default implementations. Without this, there is the possibility of ODR
 // violations and link errors.
 
 template <> void InstMIPS32Mflo::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
+template <> void InstMIPS32Lui::emit(const Cfg *Func) const;
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTMIPS32_H