SubZero: legalize for f32/f64 constants in MIPS32

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 28 matching lines @@
 bool OperandMIPS32Mem::canHoldOffset(Type Ty, bool SignExt, int32_t Offset) {
   (void)SignExt;
   (void)Ty;
   if ((std::numeric_limits<int16_t>::min() <= Offset) &&
       (Offset <= std::numeric_limits<int16_t>::max()))
     return true;
   return false;
 }
 
 OperandMIPS32Mem::OperandMIPS32Mem(Cfg *Func, Type Ty, Variable *Base,
-                                   ConstantInteger32 *ImmOffset, AddrMode Mode)
+                                   Operand *ImmOffset, AddrMode Mode)
     : OperandMIPS32(kMem, Ty), Base(Base), ImmOffset(ImmOffset), Mode(Mode) {
   // The Neg modes are only needed for Reg +/- Reg.
   (void)Func;
   // assert(!isNegAddrMode());
   NumVars = 1;
   Vars = &this->Base;
 }
 
 const char *InstMIPS32::getWidthString(Type Ty) {
   (void)Ty;
@@ skipping 54 matching lines @@
 template <> const char *InstMIPS32Subu::Opcode = "subu";
 template <> const char *InstMIPS32Sw::Opcode = "sw";
 template <> const char *InstMIPS32Swc1::Opcode = "swc1";
 template <> const char *InstMIPS32Trunc_l_d::Opcode = "trunc.l.d";
 template <> const char *InstMIPS32Trunc_l_s::Opcode = "trunc.l.s";
 template <> const char *InstMIPS32Trunc_w_d::Opcode = "trunc.w.d";
 template <> const char *InstMIPS32Trunc_w_s::Opcode = "trunc.w.s";
 template <> const char *InstMIPS32Xor::Opcode = "xor";
 template <> const char *InstMIPS32Xori::Opcode = "xori";
 
+template <> void InstMIPS32Lui::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+  Ostream &Str = Func->getContext()->getStrEmit();
+  assert(getSrcSize() == 1);
+  Str << "\t" << Opcode << "\t";
+  getDest()->emit(Func);
+  Str << ", ";
+  auto *Src0 = llvm::cast<Constant>(getSrc(0));
+  if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) {
+    emitRelocOp(Str, Reloc);
+    Str << "(";
+    CR->emitWithoutPrefix(Func->getTarget());
+    Str << ")";
+  } else {
+    Src0->emit(Func);
+  }
+}
+
 template <> void InstMIPS32Mflo::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   emitUnaryopGPRFLoHi(Opcode, this, Func);
 }
 
 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   emitUnaryopGPRFLoHi(Opcode, this, Func);
@@ skipping 119 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "[MIPS32] ";
   Inst::dump(Func);
 }
 
 void OperandMIPS32Mem::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
-  ConstantInteger32 *Offset = getOffset();
-  Offset->emit(Func);
+  Operand *Offset = getOffset();
+  if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) {
+    CR->emitWithoutPrefix(Func->getTarget());
+  } else
+    Offset->emit(Func);
   Str << "(";
   getBase()->emit(Func);
   Str << ")";
 }
 
 void InstMIPS32::emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst,
                                 const Cfg *Func) {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
@@ skipping 298 matching lines @@
   }
 
   Str << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice