SubZero: legalize for f32/f64 constants in MIPS32

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 1003 matching lines @@
   if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
     return Ctx->getConstantInt32(
         static_cast<uint32_t>(Const->getValue() >> 32));
   }
   if (auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(Operand)) {
     // Conservatively disallow memory operands with side-effects
     // in case of duplication.
     assert(Mem->getAddrMode() == OperandMIPS32Mem::Offset);
     const Type SplitType = IceType_i32;
     Variable *Base = Mem->getBase();
-    ConstantInteger32 *Offset = Mem->getOffset();
+    ConstantInteger32 *Offset = llvm::cast<ConstantInteger32>(Mem->getOffset());

[Jim Stichnoth, 2016/07/05 14:29:27]

auto *Offset = ...

     assert(!Utils::WouldOverflowAdd(Offset->getValue(), 4));
     int32_t NextOffsetVal = Offset->getValue() + 4;
     constexpr bool SignExt = false;
     if (!OperandMIPS32Mem::canHoldOffset(SplitType, SignExt, NextOffsetVal)) {
       // We have to make a temp variable and add 4 to either Base or Offset.
       // If we add 4 to Offset, this will convert a non-RegReg addressing
       // mode into a RegReg addressing mode. Since NaCl sandboxing disallows
       // RegReg addressing modes, prefer adding to base and replacing instead.
       // Thus we leave the old offset alone.
       Constant *Four = Ctx->getConstantInt32(4);
@@ skipping 1172 matching lines @@
   Type Ty = From->getType();
   // Assert that a physical register is allowed.  To date, all calls
   // to legalize() allow a physical register. Legal_Flex converts
   // registers to the right type OperandMIPS32FlexReg as needed.
   assert(Allowed & Legal_Reg);
   // Go through the various types of operands:
   // OperandMIPS32Mem, Constant, and Variable.
   // Given the above assertion, if type of operand is not legal
   // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy
   // to a register.
-  if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) {
-    (void)C;
-    // TODO(reed kotler): complete this case for proper implementation
-    Variable *Reg = makeReg(Ty, RegNum);
-    Context.insert<InstFakeDef>(Reg);
-    return Reg;
-  } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) {
-    const uint32_t Value = C32->getValue();
-    // Check if the immediate will fit in a Flexible second operand,
-    // if a Flexible second operand is allowed. We need to know the exact
-    // value, so that rules out relocatable constants.
-    // Also try the inverse and use MVN if possible.
-    // Do a movw/movt to a register.
-    Variable *Reg;
-    if (RegNum.hasValue())
-      Reg = getPhysicalRegister(RegNum);
-    else
-      Reg = makeReg(Ty, RegNum);
-    if (isInt<16>(int32_t(Value))) {
-      Variable *Zero = getPhysicalRegister(RegMIPS32::Reg_ZERO, Ty);
-      Context.insert<InstFakeDef>(Zero);
-      _addiu(Reg, Zero, Value);
-    } else {
-      uint32_t UpperBits = (Value >> 16) & 0xFFFF;
-      (void)UpperBits;
-      uint32_t LowerBits = Value & 0xFFFF;
-      Variable *TReg = makeReg(Ty, RegNum);
-      _lui(TReg, UpperBits);
-      _ori(Reg, TReg, LowerBits);
+  if (llvm::isa<Constant>(From)) {
+    if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) {
+      (void)C;
+      // TODO(reed kotler): complete this case for proper implementation
+      Variable *Reg = makeReg(Ty, RegNum);
+      Context.insert<InstFakeDef>(Reg);
+      return Reg;
+    } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) {
+      const uint32_t Value = C32->getValue();
+      // Check if the immediate will fit in a Flexible second operand,
+      // if a Flexible second operand is allowed. We need to know the exact
+      // value, so that rules out relocatable constants.
+      // Also try the inverse and use MVN if possible.
+      // Do a movw/movt to a register.
+      Variable *Reg;
+      if (RegNum.hasValue())
+        Reg = getPhysicalRegister(RegNum);
+      else
+        Reg = makeReg(Ty, RegNum);
+      if (isInt<16>(int32_t(Value))) {
+        Variable *Zero = getPhysicalRegister(RegMIPS32::Reg_ZERO, Ty);
+        Context.insert<InstFakeDef>(Zero);
+        _addiu(Reg, Zero, Value);
+      } else {
+        uint32_t UpperBits = (Value >> 16) & 0xFFFF;
+        (void)UpperBits;
+        uint32_t LowerBits = Value & 0xFFFF;
+        Variable *TReg = makeReg(Ty, RegNum);
+        _lui(TReg, Ctx->getConstantInt32(UpperBits));
+        _ori(Reg, TReg, LowerBits);
+      }
+      return Reg;
+    } else if (isScalarFloatingType(Ty)) {
+      // Load floats/doubles from literal pool.
+      auto *CFrom = llvm::cast<Constant>(From);
+      assert(CFrom->getShouldBePooled());
+      Constant *Offset = Ctx->getConstantSym(0, CFrom->getLabelName());
+      Variable *TReg1 = makeReg(getPointerType());
+      Variable *TReg2 = makeReg(Ty);
+      Context.insert<InstFakeDef>(TReg2);
+      _lui(TReg1, Offset, hi);
+      OperandMIPS32Mem *Addr =
+          OperandMIPS32Mem::create(Func, Ty, TReg1, Offset);
+      if (Ty == IceType_f32)
+        _lwc1(TReg2, Addr, lo);
+      else
+        _ldc1(TReg2, Addr, lo);
+      return copyToReg(TReg2, RegNum);
     }
-    return Reg;
   }
+
   if (auto *Var = llvm::dyn_cast<Variable>(From)) {
     // Check if the variable is guaranteed a physical register.  This
     // can happen either when the variable is pre-colored or when it is
     // assigned infinite weight.
     bool MustHaveRegister = (Var->hasReg() || Var->mustHaveReg());
     // We need a new physical register for the operand if:
     //   Mem is not allowed and Var isn't guaranteed a physical
     //   register, or
     //   RegNum is required and Var->getRegNum() doesn't match.
     if ((!(Allowed & Legal_Mem) && !MustHaveRegister) ||
@@ skipping 82 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice